From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754203AbaELXbU (ORCPT ); Mon, 12 May 2014 19:31:20 -0400 Received: from mail-bn1bon0116.outbound.protection.outlook.com ([157.56.111.116]:42406 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751491AbaELXbS (ORCPT ); Mon, 12 May 2014 19:31:18 -0400 From: To: , , , , , , , , , , CC: , , , , , , Subject: [PATCHv4 1/3] dts: socfpga: Add bindings for Altera SoC SDRAM controller Date: Mon, 12 May 2014 18:36:55 -0500 Message-ID: <1399937817-2202-2-git-send-email-tthayer@altera.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1399937817-2202-1-git-send-email-tthayer@altera.com> References: <1399937817-2202-1-git-send-email-tthayer@altera.com> MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:66.35.236.232;CTRY:US;IPV:NLI;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10019001)(6009001)(199002)(189002)(77982001)(50986999)(83072002)(87936001)(76482001)(48376002)(89996001)(79102001)(36756003)(42186004)(47776003)(93916002)(33646001)(20776003)(86362001)(50466002)(99396002)(76176999)(87286001)(2009001)(85852003)(97736001)(2201001)(74502001)(88136002)(84676001)(44976005)(46102001)(6806004)(19580405001)(83322001)(31966008)(19580395003)(74662001)(50226001)(16796002)(62966002)(92566001)(92726001)(86152002)(81342001)(81542001)(77156001)(4396001)(80022001)(102836001)(1121002)(921003)(83996005)(2101003);DIR:OUT;SFP:1102;SCL:1;SRVR:BL2FFO11HUB023;H:SJ-ITEXEDGE02.altera.priv.altera.com;FPR:;MLV:sfv;PTR:InfoDomainNonexistent;A:1;MX:1;LANG:en; X-OriginatorOrg: altera.onmicrosoft.com X-Forefront-PRVS: 0209425D0A Authentication-Results: spf=softfail (sender IP is 66.35.236.232) smtp.mailfrom=tthayer@altera.com; Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Thor Thayer Addition of the Altera SDRAM controller bindings and device tree changes to the Altera SoC project. v2: Changes to SoC SDRAM EDAC code. v3: Implement code suggestions for SDRAM EDAC code. v4: Remove syscon from SDRAM controller bindings. Signed-off-by: Thor Thayer --- .../bindings/arm/altera/socfpga-sdram.txt | 11 +++++++++++ arch/arm/boot/dts/socfpga.dtsi | 5 +++++ 2 files changed, 16 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt new file mode 100644 index 0000000..8f8746b --- /dev/null +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt @@ -0,0 +1,11 @@ +Altera SOCFPGA SDRAM Controller + +Required properties: +- compatible : "altr,sdr-ctl"; +- reg : Should contain 1 register ranges(address and length) + +Example: + sdrctl@ffc25000 { + compatible = "altr,sdr-ctl"; + reg = <0xffc25000 0x1000>; + }; diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index df43702..6ce912e 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -676,6 +676,11 @@ clocks = <&l4_sp_clk>; }; + sdrctl@ffc25000 { + compatible = "altr,sdr-ctl", "syscon"; + reg = <0xffc25000 0x1000>; + }; + rstmgr@ffd05000 { compatible = "altr,rst-mgr"; reg = <0xffd05000 0x1000>; -- 1.7.9.5