From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751577AbeAVS73 (ORCPT ); Mon, 22 Jan 2018 13:59:29 -0500 Received: from edison.jonmasters.org ([173.255.233.168]:55824 "EHLO edison.jonmasters.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751156AbeAVS7Z (ORCPT ); Mon, 22 Jan 2018 13:59:25 -0500 To: Will Deacon , Jayachandran C References: <20180118135354.GB20783@arm.com> <1516364568-95577-1-git-send-email-jnair@caviumnetworks.com> <1516364568-95577-2-git-send-email-jnair@caviumnetworks.com> <20180122114155.GC15456@arm.com> Cc: marc.zyngier@arm.com, linux-arm-kernel@lists.infradead.org, lorenzo.pieralisi@arm.com, ard.biesheuvel@linaro.org, catalin.marinas@arm.com, linux-kernel@vger.kernel.org, labbott@redhat.com, christoffer.dall@linaro.org, suzuki.poulose@arm.com From: Jon Masters Organization: World Organi{s,z}ation Of Broken Dreams Message-ID: <13e17bd2-b83c-6c67-eb0c-c80604b7dcc3@jonmasters.org> Date: Mon, 22 Jan 2018 13:59:17 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.0 MIME-Version: 1.0 In-Reply-To: <20180122114155.GC15456@arm.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 68.173.157.109 X-SA-Exim-Mail-From: jcm@jonmasters.org Subject: Re: [PATCH v3 2/2] arm64: Turn on KPTI only on CPUs that need it X-SA-Exim-Version: 4.2.1 (built Sun, 08 Nov 2009 07:31:22 +0000) X-SA-Exim-Scanned: Yes (on edison.jonmasters.org) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/22/2018 06:41 AM, Will Deacon wrote: > On Fri, Jan 19, 2018 at 04:22:48AM -0800, Jayachandran C wrote: >> Whitelist Broadcom Vulcan/Cavium ThunderX2 processors in >> unmap_kernel_at_el0(). These CPUs are not vulnerable to >> CVE-2017-5754 and do not need KPTI when KASLR is off. >> >> Signed-off-by: Jayachandran C >> --- >> arch/arm64/kernel/cpufeature.c | 7 +++++++ >> 1 file changed, 7 insertions(+) >> >> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c >> index 647d44b..fb698ca 100644 >> --- a/arch/arm64/kernel/cpufeature.c >> +++ b/arch/arm64/kernel/cpufeature.c >> @@ -866,6 +866,13 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry, >> if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) >> return true; >> >> + /* Don't force KPTI for CPUs that are not vulnerable */ >> + switch (read_cpuid_id() & MIDR_CPU_MODEL_MASK) { >> + case MIDR_CAVIUM_THUNDERX2: >> + case MIDR_BRCM_VULCAN: >> + return false; >> + } >> + >> /* Defer to CPU feature registers */ >> return !cpuid_feature_extract_unsigned_field(pfr0, >> ID_AA64PFR0_CSV3_SHIFT); > > We'll need to re-jig this to work properly with big/little because this is > only called once, but that's ok for now: > > Acked-by: Will Deacon > > Suzuki has a series reworking much of the cpufeatures code so that we can > do this properly for 4.17. Thanks, much appreciated. Jon.