From: Hanjun Guo <hanjun.guo@linaro.org>
To: Marc Zyngier <marc.zyngier@arm.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Scott Wood <oss@buserror.net>, Will Deacon <will.deacon@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Ding Tianhong <dingtianhong@huawei.com>
Subject: Re: [PATCH 17/17] arm64: arch_timer: Add HISILICON_ERRATUM_161010101 ACPI matching data
Date: Tue, 7 Mar 2017 21:19:21 +0800 [thread overview]
Message-ID: <13e4473e-e1ec-c193-4d5a-63787d149dda@linaro.org> (raw)
In-Reply-To: <20170306112622.13853-18-marc.zyngier@arm.com>
On 2017/3/6 19:26, Marc Zyngier wrote:
> In order to deal with ACPI enabled platforms suffering from the
> HISILICON_ERRATUM_161010101, let's add the required OEM data that
> allow the workaround to be enabled.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> drivers/clocksource/arm_arch_timer.c | 29 +++++++++++++++++++++++++++++
> 1 file changed, 29 insertions(+)
>
> diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
> index 6182871af4eb..b46584f058b6 100644
> --- a/drivers/clocksource/arm_arch_timer.c
> +++ b/drivers/clocksource/arm_arch_timer.c
> @@ -270,6 +270,25 @@ static u64 notrace hisi_161010101_read_cntvct_el0(void)
> {
> return __hisi_161010101_read_reg(cntvct_el0);
> }
> +
> +static struct ate_acpi_oem_info hisi_161010101_oem_info[] = {
> + {
> + .oem_id = "HISI ",
> + .oem_table_id = "HIP05 ",
> + .oem_revision = 0,
> + },
> + {
> + .oem_id = "HISI ",
> + .oem_table_id = "HIP06 ",
> + .oem_revision = 0,
> + },
> + {
> + .oem_id = "HISI ",
> + .oem_table_id = "HIP07 ",
> + .oem_revision = 0,
> + },
> + { },
Maybe it's better to add a comments that to say "It's needed to match
the end of oem info", but it's up to you :)
> +};
> #endif
>
> #ifdef CONFIG_ARM64_ERRATUM_858921
> @@ -347,6 +366,16 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
> .set_next_event_phys = erratum_set_next_event_tval_phys,
> .set_next_event_virt = erratum_set_next_event_tval_virt,
> },
> + {
> + .match_type = ate_match_acpi_oem_info,
> + .id = hisi_161010101_oem_info,
> + .desc_str = "HiSilicon erratum 161010101",
> + .read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
> + .read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
> + .read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
> + .set_next_event_phys = erratum_set_next_event_tval_phys,
> + .set_next_event_virt = erratum_set_next_event_tval_virt,
> + },
> #endif
> #ifdef CONFIG_ARM64_ERRATUM_858921
> {
>
Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>
Thanks
Hanjun
next prev parent reply other threads:[~2017-03-07 13:20 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-06 11:26 [PATCH 00/17] clocksource/arch_timer: Errara workaround infrastructure rework Marc Zyngier
2017-03-06 11:26 ` [PATCH 01/17] arm64: arch_timer: Add infrastructure for multiple erratum detection methods Marc Zyngier
2017-03-07 13:03 ` Hanjun Guo
2017-03-20 13:51 ` Mark Rutland
2017-03-06 11:26 ` [PATCH 02/17] arm64: arch_timer: Add erratum handler for globally defined capability Marc Zyngier
2017-03-06 11:26 ` [PATCH 03/17] arm64: Allow checking of a CPU-local erratum Marc Zyngier
2017-03-20 13:56 ` Mark Rutland
2017-03-20 14:09 ` Suzuki K Poulose
2017-03-06 11:26 ` [PATCH 04/17] arm64: arch_timer: Add erratum handler for CPU-specific capability Marc Zyngier
2017-03-06 11:26 ` [PATCH 05/17] arm64: arch_timer: Move arch_timer_reg_read/write around Marc Zyngier
2017-03-20 13:59 ` Mark Rutland
2017-03-06 11:26 ` [PATCH 06/17] arm64: arch_timer: Get rid of erratum_workaround_set_sne Marc Zyngier
2017-03-20 14:06 ` Mark Rutland
2017-03-20 16:59 ` Marc Zyngier
2017-03-06 11:26 ` [PATCH 07/17] arm64: arch_timer: Rework the set_next_event workarounds Marc Zyngier
2017-03-07 13:25 ` Hanjun Guo
2017-03-06 11:26 ` [PATCH 08/17] arm64: arch_timer: Make workaround methods optional Marc Zyngier
2017-03-06 11:26 ` [PATCH 09/17] arm64: arch_timer: Allows a CPU-specific erratum to only affect a subset of CPUs Marc Zyngier
2017-03-06 11:26 ` [PATCH 10/17] arm64: Add CNTVCT_EL0 trap handler Marc Zyngier
2017-03-20 14:52 ` Mark Rutland
2017-03-06 11:26 ` [PATCH 11/17] arm64: arch_timer: Move clocksource_counter and co around Marc Zyngier
2017-03-06 11:26 ` [PATCH 12/17] arm64: arch_timer: Enable CNTVCT_EL0 trap if workaround is enabled Marc Zyngier
2017-03-06 11:26 ` [PATCH 13/17] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core Marc Zyngier
2017-03-20 14:56 ` Mark Rutland
2017-03-20 15:30 ` Suzuki K Poulose
2017-03-06 11:26 ` [PATCH 14/17] arm64: Define Cortex-A73 MIDR Marc Zyngier
2017-03-06 11:26 ` [PATCH 15/17] arm64: arch_timer: Workaround for Cortex-A73 erratum 858921 Marc Zyngier
2017-03-20 14:58 ` Mark Rutland
2017-03-06 11:26 ` [PATCH 16/17] arm64: arch_timer: Allow erratum matching with ACPI OEM information Marc Zyngier
2017-03-07 13:12 ` Hanjun Guo
2017-03-06 11:26 ` [PATCH 17/17] arm64: arch_timer: Add HISILICON_ERRATUM_161010101 ACPI matching data Marc Zyngier
2017-03-07 13:19 ` Hanjun Guo [this message]
2017-03-20 15:00 ` Mark Rutland
2017-03-06 21:48 ` [PATCH 00/17] clocksource/arch_timer: Errara workaround infrastructure rework dann frazier
2017-03-07 12:56 ` Hanjun Guo
2017-03-20 15:07 ` Mark Rutland
2017-03-20 15:25 ` Marc Zyngier
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