Re: [PATCH v3 0/2] Add support for Microchip's pwm fpga core

[<Conor.Dooley@microchip.com>]

On 17/06/2022 14:09, Uwe Kleine-König wrote:
> Hello,
> 
> On Fri, Jun 17, 2022 at 11:50:13AM +0000, Conor.Dooley@microchip.com wrote:
>> On 17/06/2022 12:44, Conor Dooley wrote:
>>> Hey Uwe,
>>> Got a ~v2~ v3 for you...
>>> I added some comments explaining the calculations and a documentation link
>>> so hopefully things are a bit easier to follow.
>>>
>>> Code wise, I went through and sorted out a bunch of issues that cycling
>>> through the different periods/duties threw up. Along the way I found
>>> some other problems - especially with the longer periods which I have
>>> fixed. I also added a write to the sync register in the apply function,
>>> which will resolve to a NOP for channels without "shadow registers".
>>>
>>> Other than that, I managed to ditch the mchp_core_pwm_registers struct
>>> entirely but had to add a short delay before reading back the registers
>>> in order to compute the duty.
>>>
>>> Thanks,
>>> Conor.
>>
>> *sigh* yet again I forgot to mention the potential maintainers conflict
>> with spi-next..
> 
> I'm not a maintainer of a very active subsystem where MAINTAINER
> conflicts are normal, but my expectation up to now was that conflicts in
> that file are quite usual and trivial to resolve such that mentioning
> these isn't very important.
> 

Yeah, I figured such conflicts were rather normal but felt like it was
better to say it just in case.
Thanks,
Conor.