From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964805AbaE2Gjt (ORCPT ); Thu, 29 May 2014 02:39:49 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:47001 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933194AbaE2Gjp (ORCPT ); Thu, 29 May 2014 02:39:45 -0400 From: Kishon Vijay Abraham I To: , , , , , CC: , , , , Keerthy , Rajendra Nayak , Tero Kristo , Paul Walmsley Subject: [PATCH v2 07/18] ARM: dts: DRA7: Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck Date: Thu, 29 May 2014 12:08:09 +0530 Message-ID: <1401345500-20188-8-git-send-email-kishon@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1401345500-20188-1-git-send-email-kishon@ti.com> References: <1401345500-20188-1-git-send-email-kishon@ti.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Keerthy Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck from dpll_pcie_ref_ck. Cc: Rajendra Nayak Cc: Tero Kristo Cc: Paul Walmsley Signed-off-by: Keerthy Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/dra7xx-clocks.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi index 55e95c5..44993ec 100644 --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi @@ -1152,7 +1152,7 @@ apll_pcie_in_clk_mux: apll_pcie_in_clk_mux@4ae06118 { compatible = "ti,mux-clock"; - clocks = <&dpll_pcie_ref_ck>, <&pciesref_acs_clk_ck>; + clocks = <&dpll_pcie_ref_m2ldo_ck>, <&pciesref_acs_clk_ck>; #clock-cells = <0>; reg = <0x021c 0x4>; ti,bit-shift = <7>; -- 1.7.9.5