From: Don Zickus <dzickus@redhat.com>
To: jolsa@redhat.com
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
LKML <linux-kernel@vger.kernel.org>,
namhyung@gmail.com, eranian@google.com,
Andi Kleen <andi@firstfloor.org>, Don Zickus <dzickus@redhat.com>
Subject: [PATCH 6/7 V3] perf: Add support to dynamically get cacheline size
Date: Fri, 30 May 2014 16:10:05 -0400 [thread overview]
Message-ID: <1401480605-97442-1-git-send-email-dzickus@redhat.com> (raw)
In-Reply-To: <1401208087-181977-7-git-send-email-dzickus@redhat.com>
Different arches may have different cacheline sizes. Look it up and set
a global variable for reference.
Signed-off-by: Don Zickus <dzickus@redhat.com>
---
V4: make it super simple using a sysconf (Arnaldo)
V3: remove unneeded cpumap.h (Namhyung Kim)
V2: change to be global and setup in perf.c
use filename__read_int for setup
revert cacheline size stuff
---
tools/perf/perf.c | 1 +
tools/perf/util/util.c | 1 +
tools/perf/util/util.h | 1 +
3 files changed, 3 insertions(+)
diff --git a/tools/perf/perf.c b/tools/perf/perf.c
index 431798a..d0374d4 100644
--- a/tools/perf/perf.c
+++ b/tools/perf/perf.c
@@ -458,6 +458,7 @@ int main(int argc, const char **argv)
/* The page_size is placed in util object. */
page_size = sysconf(_SC_PAGE_SIZE);
+ cacheline_size = sysconf(_SC_LEVEL1_DCACHE_LINESIZE);
cmd = perf_extract_argv0_path(argv[0]);
if (!cmd)
diff --git a/tools/perf/util/util.c b/tools/perf/util/util.c
index 7fff6be..95aefa7 100644
--- a/tools/perf/util/util.c
+++ b/tools/perf/util/util.c
@@ -17,6 +17,7 @@
* XXX We need to find a better place for these things...
*/
unsigned int page_size;
+int cacheline_size;
bool test_attr__enabled;
diff --git a/tools/perf/util/util.h b/tools/perf/util/util.h
index b03da44..6686436 100644
--- a/tools/perf/util/util.h
+++ b/tools/perf/util/util.h
@@ -304,6 +304,7 @@ char *rtrim(char *s);
void dump_stack(void);
extern unsigned int page_size;
+extern int cacheline_size;
void get_term_dimensions(struct winsize *ws);
--
1.7.11.7
next prev parent reply other threads:[~2014-05-30 20:11 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-27 16:28 [PATCH 0/7 V4] perf: Enable mmap2 and add dcacheline sorting Don Zickus
2014-05-27 16:28 ` [PATCH 1/7] events, perf: Pass protection and flags bits through mmap2 interface Don Zickus
2014-05-27 16:28 ` [PATCH 2/7] Revert "perf: Disable PERF_RECORD_MMAP2 support" Don Zickus
2014-05-30 7:05 ` Namhyung Kim
2014-05-30 14:49 ` [PATCH 2/7 V2] " Don Zickus
2014-06-12 12:02 ` [tip:perf/core] " tip-bot for Don Zickus
2014-05-27 16:28 ` [PATCH 3/7] perf: Update mmap2 interface with protection and flag bits Don Zickus
2014-05-27 16:28 ` [PATCH 4/7] perf report: Add mem-mode documentation to report command Don Zickus
2014-05-27 16:28 ` [PATCH 5/7] perf: Add cpumode to struct hist_entry Don Zickus
2014-06-12 12:03 ` [tip:perf/core] perf tools: " tip-bot for Don Zickus
2014-05-27 16:28 ` [PATCH 6/7] perf: Add support to dynamically get cacheline size Don Zickus
2014-05-30 7:09 ` Namhyung Kim
2014-05-30 14:50 ` [PATCH 6/7 V2] " Don Zickus
2014-05-30 15:28 ` Arnaldo Carvalho de Melo
2014-05-30 16:20 ` Don Zickus
2014-05-30 20:10 ` Don Zickus [this message]
2014-06-12 12:03 ` [tip:perf/core] perf tools: " tip-bot for Don Zickus
2014-05-27 16:28 ` [PATCH 7/7] perf: Add dcacheline sort Don Zickus
2014-06-12 12:03 ` [tip:perf/core] perf tools: " tip-bot for Don Zickus
2014-05-30 7:15 ` [PATCH 0/7 V4] perf: Enable mmap2 and add dcacheline sorting Namhyung Kim
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