From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755585AbaFKHxe (ORCPT ); Wed, 11 Jun 2014 03:53:34 -0400 Received: from mga02.intel.com ([134.134.136.20]:28725 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751161AbaFKHxd (ORCPT ); Wed, 11 Jun 2014 03:53:33 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.01,456,1400050800"; d="scan'208";a="526687505" From: Chew Chiau Ee To: Eric Miao , Russell King , Haojian Zhuang , Mark Brown Cc: Mika Westerberg , LKML , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, Chew Chiau Ee Subject: [PATCH] spi/pxa2xx: fix incorrect SW mode chipselect setting for BayTrail LPSS SPI Date: Wed, 11 Jun 2014 23:57:02 +0800 Message-Id: <1402502222-19520-1-git-send-email-chiau.ee.chew@intel.com> X-Mailer: git-send-email 1.7.4.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Chew, Chiau Ee It was observed that after module removal followed by insertion, the SW mode chipselect is not properly set. Thus causing transfer failure due to incorrect CS toggling. Signed-off-by: Chew, Chiau Ee Acked-by: Mika Westerberg --- drivers/spi/spi-pxa2xx.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index a98df7e..cfaf3e6 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -126,7 +126,7 @@ static void lpss_ssp_setup(struct driver_data *drv_data) goto detection_done; } - value &= ~SPI_CS_CONTROL_SW_MODE; + orig = value &= ~SPI_CS_CONTROL_SW_MODE; writel(value, drv_data->ioaddr + offset + SPI_CS_CONTROL); value = readl(drv_data->ioaddr + offset + SPI_CS_CONTROL); if (value != orig) { -- 1.7.4.4