From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754463AbaFPMMy (ORCPT ); Mon, 16 Jun 2014 08:12:54 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:39540 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754098AbaFPMMw (ORCPT ); Mon, 16 Jun 2014 08:12:52 -0400 From: Sricharan R To: , , , CC: , , , , , , , , , Benoit Cousson Subject: [PATCH V3 1/2] arm: dts: dra7: add routable-irqs property for gic node Date: Mon, 16 Jun 2014 17:40:21 +0530 Message-ID: <1402920622-7998-2-git-send-email-r.sricharan@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1402920622-7998-1-git-send-email-r.sricharan@ti.com> References: <1402920622-7998-1-git-send-email-r.sricharan@ti.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: R Sricharan There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The gic provides the support for such IPs in the form of routable-irqs. So adding the property here to gic node. Signed-off-by: Sricharan R Signed-off-by: Nishanth Menon Cc: Benoit Cousson Cc: Santosh Shilimkar Cc: Rajendra Nayak Cc: Tony Lindgren --- arch/arm/boot/dts/dra7.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index c29945e..1cf4ee1 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -45,6 +45,7 @@ compatible = "arm,cortex-a15-gic"; interrupt-controller; #interrupt-cells = <3>; + arm,routable-irqs = <192>; reg = <0x48211000 0x1000>, <0x48212000 0x1000>, <0x48214000 0x2000>, -- 1.7.9.5