From: Feng Kan <fkan@apm.com>
To: tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com,
linux-kernel@vger.kernel.org, patches@apm.com
Cc: Feng Kan <fkan@apm.com>
Subject: [PATCH v2 0/2] irqchip: gic: Add support for GIC v2 bypass disable
Date: Wed, 25 Jun 2014 15:07:19 -0700 [thread overview]
Message-ID: <1403734041-5112-1-git-send-email-fkan@apm.com> (raw)
This patch series cleans up hex number in the gic driver and then adds
the code to preserve GIC v2 bypass disable bits in the GIC driver.
V2 Change:
seem my send email was not working correctly, resending this with
rebase pull.
- had to pull HaoJian's change out of arm-gic.h to keep consistency.
- replace GIC defines as noted by Marc
- remove GIC_CPU_DISABLE since it no longer used.
- fix gic_cpu_if_down as noted by Marc
PM path gic cpu ctrl register restore is not added here, I will have to
test that seperately once all the PM code is fully in place and submit it
afterward.
Feng Kan (2):
irqchip: gic: replace hex numbers with defines.
irqchip: gic: preserve gic V2 bypass bits in cpu ctrl register
drivers/irqchip/irq-gic.c | 82 +++++++++++++++++++++++++++++++++++------------
1 file changed, 62 insertions(+), 20 deletions(-)
--
1.9.1
next reply other threads:[~2014-06-25 22:07 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-25 22:07 Feng Kan [this message]
2014-06-25 22:07 ` [PATCH V2 1/2] irqchip: gic: replace hex numbers with defines Feng Kan
2014-06-25 22:07 ` [PATCH V2 2/2] irqchip: gic: preserve gic V2 bypass bits in cpu ctrl register Feng Kan
2014-06-26 1:05 ` Thomas Gleixner
2014-06-26 16:48 ` Feng Kan
2014-06-27 11:17 ` Jason Cooper
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