From: Joe Perches <joe@perches.com>
To: Jean-Michel Hautbois <jean-michel.hautbois@vodalys.com>
Cc: linux-kernel <linux-kernel@vger.kernel.org>, sr@denx.de
Subject: Re: [PATCH] Lattice ECP3 FPGA: Correct endianness
Date: Thu, 03 Jul 2014 09:12:00 -0700 [thread overview]
Message-ID: <1404403920.14741.44.camel@joe-AO725> (raw)
In-Reply-To: <CAL8zT=isq_2RT07a6z8imJ4N0w0v-yw6ysv3wf+S7sLsqZBCeg@mail.gmail.com>
On Thu, 2014-07-03 at 17:54 +0200, Jean-Michel Hautbois wrote:
> This patch corrects three big/little endian issues. Tested on i.MX6.
trivial:
> diff --git a/drivers/misc/lattice-ecp3-config.c
[]
> @@ -165,8 +165,8 @@ static void firmware_load(const struct firmware
> *fw, void *context)
>
> txbuf[0] = FPGA_CMD_READ_STATUS;
> ret = spi_write_then_read(spi, txbuf, 8, rxbuf, rx_len);
> - dev_dbg(&spi->dev, "FPGA Status=%08x\n", *(u32 *)&rxbuf[4]);
> - status = *(u32 *)&rxbuf[4];
> + dev_dbg(&spi->dev, "FPGA Status=%08x\n", be32_to_cpu(*(u32 *)&rxbuf[4]));
> + status = be32_to_cpu(*(u32 *)&rxbuf[4]);
This should emit a sparse error.
It'd be simpler as:
status = be32_to_cpu(*(__be32 *)&rxbuf[4]);
dev_dbg(&spi->dev, "FPGA Status=%08x\n", status);
next prev parent reply other threads:[~2014-07-03 16:12 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-03 15:54 Jean-Michel Hautbois
2014-07-03 15:59 ` Stefan Roese
2014-07-03 16:12 ` Joe Perches [this message]
2014-07-04 13:11 ` Jean-Michel Hautbois
2014-07-04 13:14 ` Stefan Roese
2014-07-04 14:58 ` Geert Uytterhoeven
2014-07-04 15:16 ` Jean-Michel Hautbois
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