From: Liu Hua <sdu.liu@huawei.com>
To: <tglx@linutronix.de>, <jason@lakedaemon.net>,
<nicolas.pitre@linaro.org>, <linux@arm.linux.org.uk>,
<will.deacon@arm.com>, <ebiederm@xmission.com>
Cc: <linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <wangnan0@huawei.com>,
<liuxueliu.liu@huawei.com>, <peifeiyue@huawei.com>,
<liusdu@huawei.com>, Liu Hua <sdu.liu@huawei.com>
Subject: [RFC PATCH 1/2] irqchip: GIC: introduce ICPIDR2 register interface
Date: Fri, 11 Jul 2014 14:46:16 +0800 [thread overview]
Message-ID: <1405061177-43834-2-git-send-email-sdu.liu@huawei.com> (raw)
In-Reply-To: <1405061177-43834-1-git-send-email-sdu.liu@huawei.com>
Peripheral ID2 Register provides a four-bit architecturally-defined
architecture revision field. So we can identify the GIC verison from
this register. It is useful sometimes.
Signed-off-by: Liu Hua <sdu.liu@huawei.com>
---
include/linux/irqchip/arm-gic.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
index 45e2d8c..872a562 100644
--- a/include/linux/irqchip/arm-gic.h
+++ b/include/linux/irqchip/arm-gic.h
@@ -38,6 +38,7 @@
#define GIC_DIST_SOFTINT 0xf00
#define GIC_DIST_SGI_PENDING_CLEAR 0xf10
#define GIC_DIST_SGI_PENDING_SET 0xf20
+#define GIC_DIST_ICPIDR2 0xfe8
#define GICH_HCR 0x0
#define GICH_VTR 0x4
--
1.9.0
next prev parent reply other threads:[~2014-07-11 23:47 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-11 6:46 [RFC PATCH 0/2] irqchip: GIC: check and clear GIC interupt active status Liu Hua
2014-07-11 6:46 ` Liu Hua [this message]
2014-07-11 6:46 ` [RFC PATCH 2/2] irqchip: GIC: introduce method to deactive interupts Liu Hua
2014-07-11 12:35 ` [RFC PATCH 0/2] irqchip: GIC: check and clear GIC interupt active status Will Deacon
2014-07-14 3:22 ` Liu hua
2014-07-14 9:57 ` Will Deacon
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