From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754308AbaG2Udv (ORCPT ); Tue, 29 Jul 2014 16:33:51 -0400 Received: from mail-pa0-f73.google.com ([209.85.220.73]:57764 "EHLO mail-pa0-f73.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753927AbaG2UdL (ORCPT ); Tue, 29 Jul 2014 16:33:11 -0400 From: Doug Anderson To: Heiko Stuebner , Seungwon Jeon , Jaehoon Chung , Chris Ball , Ulf Hansson Cc: Addy Ke , Kever Yang , Sonny Rao , linux-arm-kernel@lists.infradead.org, linux-mmc@vger.kernel.org, Doug Anderson , robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/5] ARM: dts: Add emmc and sdmmc to the rk3288 device tree Date: Tue, 29 Jul 2014 13:31:52 -0700 Message-Id: <1406665916-23396-2-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.0.0.526.g5318336 In-Reply-To: <1406665916-23396-1-git-send-email-dianders@chromium.org> References: <1406665916-23396-1-git-send-email-dianders@chromium.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds support for the sdmmc and emmc ports on the rk3288 using the currently posted driver from Addy at: https://patchwork.kernel.org/patch/4520631/ Note: * This is not baesd on Jaehoon's patch series removing the slot node, but it does use new syntax like putting the bus width at the top level and using the new cap-mmc-highspeed / cap-sd-highspeed. A future patch will modify this one to remove the slot node. Signed-off-by: Doug Anderson --- arch/arm/boot/dts/rk3288.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 3ef8951..fd77a65 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -78,6 +78,28 @@ clock-frequency = <24000000>; }; + sdmmc: dwmmc@ff0c0000 { + compatible = "rockchip,rk3288-dw-mshc"; + clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; + clock-names = "biu", "ciu"; + fifo-depth = <0x100>; + interrupts = ; + reg = <0xff0c0000 0x4000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + emmc: dwmmc@ff0f0000 { + compatible = "rockchip,rk3288-dw-mshc"; + clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>; + clock-names = "biu", "ciu"; + fifo-depth = <0x100>; + interrupts = ; + reg = <0xff0f0000 0x4000>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c1: i2c@ff140000 { compatible = "rockchip,rk3288-i2c"; reg = <0xff140000 0x1000>; -- 2.0.0.526.g5318336