From: Oded Gabbay <oded.gabbay@amd.com>
To: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
"David Airlie" <airlied@linux.ie>,
"Jérôme Glisse" <j.glisse@gmail.com>,
"Alexander Deucher" <alexdeucher@gmail.com>
Cc: Andrew Morton <akpm@linux-foundation.org>,
<John.Bridgman@amd.com>, "Joerg Roedel" <joro@8bytes.org>,
<Andrew.Lewycky@amd.com>, <deathsimple@vodafone.de>,
<michel.daenzer@amd.com>, Oded Gabbay <oded.gabbay@amd.com>
Subject: [PATCH v3 02/23] drm/radeon/cik: Don't touch int of pipes 1-7
Date: Tue, 5 Aug 2014 18:30:30 +0300 [thread overview]
Message-ID: <1407252651-3539-3-git-send-email-oded.gabbay@amd.com> (raw)
In-Reply-To: <1407252651-3539-1-git-send-email-oded.gabbay@amd.com>
amdkfd should set interrupts for pipes 1-7.
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
---
drivers/gpu/drm/radeon/cik.c | 71 +-------------------------------------------
1 file changed, 1 insertion(+), 70 deletions(-)
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 9571be8..d54d3d7 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -7265,8 +7265,7 @@ static int cik_irq_init(struct radeon_device *rdev)
int cik_irq_set(struct radeon_device *rdev)
{
u32 cp_int_cntl;
- u32 cp_m1p0, cp_m1p1, cp_m1p2, cp_m1p3;
- u32 cp_m2p0, cp_m2p1, cp_m2p2, cp_m2p3;
+ u32 cp_m1p0;
u32 crtc1 = 0, crtc2 = 0, crtc3 = 0, crtc4 = 0, crtc5 = 0, crtc6 = 0;
u32 hpd1, hpd2, hpd3, hpd4, hpd5, hpd6;
u32 grbm_int_cntl = 0;
@@ -7300,13 +7299,6 @@ int cik_irq_set(struct radeon_device *rdev)
dma_cntl1 = RREG32(SDMA0_CNTL + SDMA1_REGISTER_OFFSET) & ~TRAP_ENABLE;
cp_m1p0 = RREG32(CP_ME1_PIPE0_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;
- cp_m1p1 = RREG32(CP_ME1_PIPE1_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;
- cp_m1p2 = RREG32(CP_ME1_PIPE2_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;
- cp_m1p3 = RREG32(CP_ME1_PIPE3_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;
- cp_m2p0 = RREG32(CP_ME2_PIPE0_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;
- cp_m2p1 = RREG32(CP_ME2_PIPE1_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;
- cp_m2p2 = RREG32(CP_ME2_PIPE2_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;
- cp_m2p3 = RREG32(CP_ME2_PIPE3_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;
if (rdev->flags & RADEON_IS_IGP)
thermal_int = RREG32_SMC(CG_THERMAL_INT_CTRL) &
@@ -7328,33 +7320,6 @@ int cik_irq_set(struct radeon_device *rdev)
case 0:
cp_m1p0 |= TIME_STAMP_INT_ENABLE;
break;
- case 1:
- cp_m1p1 |= TIME_STAMP_INT_ENABLE;
- break;
- case 2:
- cp_m1p2 |= TIME_STAMP_INT_ENABLE;
- break;
- case 3:
- cp_m1p2 |= TIME_STAMP_INT_ENABLE;
- break;
- default:
- DRM_DEBUG("si_irq_set: sw int cp1 invalid pipe %d\n", ring->pipe);
- break;
- }
- } else if (ring->me == 2) {
- switch (ring->pipe) {
- case 0:
- cp_m2p0 |= TIME_STAMP_INT_ENABLE;
- break;
- case 1:
- cp_m2p1 |= TIME_STAMP_INT_ENABLE;
- break;
- case 2:
- cp_m2p2 |= TIME_STAMP_INT_ENABLE;
- break;
- case 3:
- cp_m2p2 |= TIME_STAMP_INT_ENABLE;
- break;
default:
DRM_DEBUG("si_irq_set: sw int cp1 invalid pipe %d\n", ring->pipe);
break;
@@ -7371,33 +7336,6 @@ int cik_irq_set(struct radeon_device *rdev)
case 0:
cp_m1p0 |= TIME_STAMP_INT_ENABLE;
break;
- case 1:
- cp_m1p1 |= TIME_STAMP_INT_ENABLE;
- break;
- case 2:
- cp_m1p2 |= TIME_STAMP_INT_ENABLE;
- break;
- case 3:
- cp_m1p2 |= TIME_STAMP_INT_ENABLE;
- break;
- default:
- DRM_DEBUG("si_irq_set: sw int cp2 invalid pipe %d\n", ring->pipe);
- break;
- }
- } else if (ring->me == 2) {
- switch (ring->pipe) {
- case 0:
- cp_m2p0 |= TIME_STAMP_INT_ENABLE;
- break;
- case 1:
- cp_m2p1 |= TIME_STAMP_INT_ENABLE;
- break;
- case 2:
- cp_m2p2 |= TIME_STAMP_INT_ENABLE;
- break;
- case 3:
- cp_m2p2 |= TIME_STAMP_INT_ENABLE;
- break;
default:
DRM_DEBUG("si_irq_set: sw int cp2 invalid pipe %d\n", ring->pipe);
break;
@@ -7486,13 +7424,6 @@ int cik_irq_set(struct radeon_device *rdev)
WREG32(SDMA0_CNTL + SDMA1_REGISTER_OFFSET, dma_cntl1);
WREG32(CP_ME1_PIPE0_INT_CNTL, cp_m1p0);
- WREG32(CP_ME1_PIPE1_INT_CNTL, cp_m1p1);
- WREG32(CP_ME1_PIPE2_INT_CNTL, cp_m1p2);
- WREG32(CP_ME1_PIPE3_INT_CNTL, cp_m1p3);
- WREG32(CP_ME2_PIPE0_INT_CNTL, cp_m2p0);
- WREG32(CP_ME2_PIPE1_INT_CNTL, cp_m2p1);
- WREG32(CP_ME2_PIPE2_INT_CNTL, cp_m2p2);
- WREG32(CP_ME2_PIPE3_INT_CNTL, cp_m2p3);
WREG32(GRBM_INT_CNTL, grbm_int_cntl);
--
1.9.1
next prev parent reply other threads:[~2014-08-05 15:31 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-05 15:30 [PATCH v3 00/23] AMDKFD Kernel Driver Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 01/23] drm/radeon: reduce number of free VMIDs and pipes in KV Oded Gabbay
2014-08-05 15:30 ` Oded Gabbay [this message]
2014-08-05 15:30 ` [PATCH v3 03/23] drm/radeon: Report doorbell configuration to amdkfd Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 04/23] drm/radeon: adding synchronization for GRBM GFX Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 05/23] drm/radeon: Add radeon <--> amdkfd interface Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 06/23] Update MAINTAINERS and CREDITS files with amdkfd info Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 07/23] amdkfd: Add IOCTL set definitions of amdkfd Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 08/23] amdkfd: Add amdkfd skeleton driver Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 09/23] amdkfd: Add topology module to amdkfd Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 10/23] amdkfd: Add basic modules " Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 11/23] amdkfd: Add binding/unbinding calls to amd_iommu driver Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 12/23] amdkfd: Add queue module Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 13/23] amdkfd: Add mqd_manager module Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 14/23] amdkfd: Add kernel queue module Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 15/23] amdkfd: Add module parameter of scheduling policy Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 16/23] amdkfd: Add packet manager module Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 17/23] amdkfd: Add process queue " Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 18/23] amdkfd: Add device " Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 19/23] amdkfd: Add interrupt handling module Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 20/23] amdkfd: Implement the create/destroy/update queue IOCTLs Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 21/23] amdkfd: Implement the Set Memory Policy IOCTL Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 22/23] amdkfd: Implement the Get Clock Counters IOCTL Oded Gabbay
2014-08-05 15:30 ` [PATCH v3 23/23] amdkfd: Implement the Get Process Aperture IOCTL Oded Gabbay
2014-08-05 17:11 ` [PATCH v3 00/23] AMDKFD Kernel Driver David Herrmann
2014-08-05 18:35 ` Oded Gabbay
2014-09-26 11:02 ` Oded Gabbay
2014-08-05 17:51 ` Jerome Glisse
2014-08-05 18:39 ` Bridgman, John
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