From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757575AbaHGJfk (ORCPT ); Thu, 7 Aug 2014 05:35:40 -0400 Received: from mail-ig0-f169.google.com ([209.85.213.169]:33046 "EHLO mail-ig0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753317AbaHGJfh (ORCPT ); Thu, 7 Aug 2014 05:35:37 -0400 From: Kever Yang To: Paul Zimmerman , heiko@sntech.de Cc: dianders@chromium.org, olof@lixom.net, sonnyrao@chromium.org, addy.ke@rock-chips.com, cf@rock-chips.com, xjq@rock-chips.com, wulf@rock-chips.com, lyz@rock-chips.com, hj@rock-chips.com, huangtao@rock-chips.com, Kever Yang , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 3/4] ARM: dts: add rk3288 dwc2 controller support Date: Thu, 7 Aug 2014 17:34:54 +0800 Message-Id: <1407404095-3265-4-git-send-email-kever.yang@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1407404095-3265-1-git-send-email-kever.yang@rock-chips.com> References: <1407404095-3265-1-git-send-email-kever.yang@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org rk3288 has two kind of usb controller, this add the dwc2 controller for otg and host1. Controller can works with usb PHY default setting and Vbus on. Signed-off-by: Kever Yang --- Changes in v4: None Changes in v3: - EHCI and HSIC move new for version 3. Changes in v2: None arch/arm/boot/dts/rk3288.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index e7cb008..9713054 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -156,6 +156,26 @@ status = "disabled"; }; + usb_host1: usb@ff540000 { + compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb", + "snps,dwc2"; + reg = <0xff540000 0x40000>; + interrupts = ; + clocks = <&cru HCLK_USBHOST1>; + clock-names = "otg"; + status = "disabled"; + }; + + usb_otg: usb@ff580000 { + compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb", + "snps,dwc2"; + reg = <0xff580000 0x40000>; + interrupts = ; + clocks = <&cru HCLK_OTG0>; + clock-names = "otg"; + status = "disabled"; + }; + uart2: serial@ff690000 { compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart"; reg = <0xff690000 0x100>; -- 1.9.1