From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932104AbaHLHGz (ORCPT ); Tue, 12 Aug 2014 03:06:55 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:51357 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753505AbaHLHDR (ORCPT ); Tue, 12 Aug 2014 03:03:17 -0400 From: Yijing Wang To: Bjorn Helgaas CC: , Xinwei Hu , Wuyun , , Marc Zyngier , , Russell King , , , "Arnd Bergmann" , Thomas Gleixner , "H. Peter Anvin" , Konrad Rzeszutek Wilk , , Joerg Roedel , , , "Benjamin Herrenschmidt" , , , Sebastian Ott , "Tony Luck" , , "David S. Miller" , , Chris Metcalf , Yijing Wang Subject: [RFC PATCH 13/20] MIPS/xlr/MSI: Use msi_chip instead of arch func to configure MSI/MSI-X Date: Tue, 12 Aug 2014 15:26:06 +0800 Message-ID: <1407828373-24322-14-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1407828373-24322-1-git-send-email-wangyijing@huawei.com> References: <1407828373-24322-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Introduce a new struct msi_chip xlr_msi_chip instead of weak arch functions to configure MSI/MSI-X. Signed-off-by: Yijing Wang --- arch/mips/pci/pci-xlr.c | 19 +++++++++++++++---- 1 files changed, 15 insertions(+), 4 deletions(-) diff --git a/arch/mips/pci/pci-xlr.c b/arch/mips/pci/pci-xlr.c index 0dde803..6eef164 100644 --- a/arch/mips/pci/pci-xlr.c +++ b/arch/mips/pci/pci-xlr.c @@ -214,11 +214,11 @@ static int get_irq_vector(const struct pci_dev *dev) } #ifdef CONFIG_PCI_MSI -void arch_teardown_msi_irq(unsigned int irq) +void xlr_teardown_msi_irq(unsigned int irq) { } -int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) +int xlr_setup_msi_irq(struct device *dev, struct msi_desc *desc) { struct msi_msg msg; struct pci_dev *lnk; @@ -233,7 +233,7 @@ int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) * Enable MSI on the XLS PCIe controller bridge which was disabled * at enumeration, the bridge MSI capability is at 0x50 */ - lnk = xls_get_pcie_link(dev); + lnk = xls_get_pcie_link(to_pci_dev(dev)); if (lnk == NULL) return 1; @@ -243,7 +243,7 @@ int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) pci_write_config_word(lnk, 0x50 + PCI_MSI_FLAGS, val); } - irq = get_irq_vector(dev); + irq = get_irq_vector(to_pci_dev(dev)); if (irq <= 0) return 1; @@ -263,6 +263,17 @@ int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) write_msi_msg(irq, &msg); return 0; } + +struct msi_chip xlr_msi_chip = { + .setup_irq = xlr_setup_msi_irq, + .teardown_irq = xlr_teardown_msi_irq, +}; + +struct msi_chip *arch_get_match_msi_chip(struct device *dev) +{ + return &xlr_msi_chip; +} + #endif /* Extra ACK needed for XLR on chip PCI controller */ -- 1.7.1