From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752929AbaHLHDC (ORCPT ); Tue, 12 Aug 2014 03:03:02 -0400 Received: from szxga03-in.huawei.com ([119.145.14.66]:64736 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750699AbaHLHC5 (ORCPT ); Tue, 12 Aug 2014 03:02:57 -0400 From: Yijing Wang To: Bjorn Helgaas CC: , Xinwei Hu , Wuyun , , Marc Zyngier , , Russell King , , , "Arnd Bergmann" , Thomas Gleixner , "H. Peter Anvin" , Konrad Rzeszutek Wilk , , Joerg Roedel , , , "Benjamin Herrenschmidt" , , , Sebastian Ott , "Tony Luck" , , "David S. Miller" , , Chris Metcalf , Yijing Wang Subject: [RFC PATCH 07/20] x86/MSI: Use msi_chip instead of arch func to configure MSI/MSI-X Date: Tue, 12 Aug 2014 15:26:00 +0800 Message-ID: <1407828373-24322-8-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1407828373-24322-1-git-send-email-wangyijing@huawei.com> References: <1407828373-24322-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020204.53E9BC13.0082,ss=1,re=0.000,fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2011-05-27 18:58:46 X-Mirapoint-Loop-Id: 29901a774a85544d3193390c049337ac Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Introduce a new struct msi_chip apic_msi_chip instead of weak arch functions to configure MSI/MSI-X in x86. Signed-off-by: Yijing Wang --- arch/x86/include/asm/pci.h | 1 + arch/x86/kernel/apic/io_apic.c | 20 ++++++++++++++++---- 2 files changed, 17 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h index 0892ea0..878a06d 100644 --- a/arch/x86/include/asm/pci.h +++ b/arch/x86/include/asm/pci.h @@ -101,6 +101,7 @@ void native_teardown_msi_irq(unsigned int irq); void native_restore_msi_irqs(struct pci_dev *dev); int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, unsigned int irq_base, unsigned int irq_offset); +extern struct msi_chip *x86_msi_chip; #else #define native_setup_msi_irqs NULL #define native_teardown_msi_irq NULL diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index 2609dcd..eb8ab7c 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -3077,24 +3077,25 @@ int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, return 0; } -int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) +int native_setup_msi_irqs(struct device *dev, int nvec, int type) { struct msi_desc *msidesc; unsigned int irq; int node, ret; + struct pci_dev *pdev = to_pci_dev(dev); /* Multiple MSI vectors only supported with interrupt remapping */ if (type == PCI_CAP_ID_MSI && nvec > 1) return 1; - node = dev_to_node(&dev->dev); + node = dev_to_node(dev); - list_for_each_entry(msidesc, &dev->msi_list, list) { + list_for_each_entry(msidesc, &pdev->msi_list, list) { irq = irq_alloc_hwirq(node); if (!irq) return -ENOSPC; - ret = setup_msi_irq(dev, msidesc, irq, 0); + ret = setup_msi_irq(pdev, msidesc, irq, 0); if (ret < 0) { irq_free_hwirq(irq); return ret; @@ -3214,6 +3215,17 @@ int default_setup_hpet_msi(unsigned int irq, unsigned int id) } #endif +struct msi_chip apic_msi_chip = { + .setup_irqs = native_setup_msi_irqs, + .teardown_irq = native_teardown_msi_irq, +}; + +struct msi_chip *arch_get_match_msi_chip(struct device *dev) +{ + return x86_msi_chip; +} + +struct msi_chip *x86_msi_chip = &apic_msi_chip; #endif /* CONFIG_PCI_MSI */ /* * Hypertransport interrupt support -- 1.7.1