From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752021AbaHLXV0 (ORCPT ); Tue, 12 Aug 2014 19:21:26 -0400 Received: from mail-pa0-f73.google.com ([209.85.220.73]:40029 "EHLO mail-pa0-f73.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751518AbaHLXVU (ORCPT ); Tue, 12 Aug 2014 19:21:20 -0400 From: Doug Anderson To: Heiko Stuebner , Seungwon Jeon , Jaehoon Chung , Chris Ball , Ulf Hansson Cc: Addy Ke , Kever Yang , Sonny Rao , linux-arm-kernel@lists.infradead.org, linux-mmc@vger.kernel.org, Arnd Bergmann , Doug Anderson , robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 1/2] ARM: dts: Add emmc and sdmmc to the rk3288 device tree Date: Tue, 12 Aug 2014 16:21:13 -0700 Message-Id: <1407885674-16469-2-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 In-Reply-To: <1407885674-16469-1-git-send-email-dianders@chromium.org> References: <1407885674-16469-1-git-send-email-dianders@chromium.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds support for the sdmmc and emmc ports on the rk3288. Signed-off-by: Doug Anderson Acked-by: Arnd Bergmann --- Changes in v4: - Add status="disabled". - Squash patch #1 and #4 since Jaehoon's patch landed. Changes in v3: None Changes in v2: - Refer to the new title of Jaehoon's patch - New patchwork link for Addy's patch arch/arm/boot/dts/rk3288.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 5950b0a..36be7bb 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -78,6 +78,26 @@ clock-frequency = <24000000>; }; + sdmmc: dwmmc@ff0c0000 { + compatible = "rockchip,rk3288-dw-mshc"; + clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; + clock-names = "biu", "ciu"; + fifo-depth = <0x100>; + interrupts = ; + reg = <0xff0c0000 0x4000>; + status = "disabled"; + }; + + emmc: dwmmc@ff0f0000 { + compatible = "rockchip,rk3288-dw-mshc"; + clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>; + clock-names = "biu", "ciu"; + fifo-depth = <0x100>; + interrupts = ; + reg = <0xff0f0000 0x4000>; + status = "disabled"; + }; + i2c1: i2c@ff140000 { compatible = "rockchip,rk3288-i2c"; reg = <0xff140000 0x1000>; -- 2.1.0.rc2.206.gedb03e5