From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758712AbaHZOTW (ORCPT ); Tue, 26 Aug 2014 10:19:22 -0400 Received: from mailout1.w1.samsung.com ([210.118.77.11]:42203 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758516AbaHZOSL (ORCPT ); Tue, 26 Aug 2014 10:18:11 -0400 X-AuditID: cbfec7f4-b7f156d0000063c7-e9-53fc97210e97 From: Tomasz Figa To: linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Russell King - ARM Linux , Kukjin Kim , lauraa@codeaurora.org, linux-omap@vger.kernel.org, linus.walleij@linaro.org, santosh.shilimkar@ti.com, tony@atomide.com, drake@endlessm.com, Marek Szyprowski , Tomasz Figa , loeliger@gmail.com, Tomasz Figa Subject: [PATCH v4 7/7] ARM: dts: exynos4: Add nodes for L2 cache controller Date: Tue, 26 Aug 2014 16:18:00 +0200 Message-id: <1409062680-15906-8-git-send-email-t.figa@samsung.com> X-Mailer: git-send-email 2.0.4 In-reply-to: <1409062680-15906-1-git-send-email-t.figa@samsung.com> References: <1409062680-15906-1-git-send-email-t.figa@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrELMWRmVeSWpSXmKPExsVy+t/xK7qK0/8EG+x9a2zxaP5jZoveBVfZ LLZ3zmC3mPJnOZPFpsfXWC0u75rDZjF7ST+LxYzz+5gsbl/mtTi3fQuLxdojd9ktXvetYbZY P+M1i8WqXX8YLfZf8XLg92hp7mHz+PZ1EovH5b5eJo9F37M8ds66y+5x59oeNo/NS+o9+ras YvQ4fmM7k8fnTXIBXFFcNimpOZllqUX6dglcGT339rAUHOSp6H72ma2BcT5XFyMnh4SAicTB qy3MELaYxIV769lAbCGBpYwSH6d4djFyAdl9TBJLPi9hAkmwCahJfG54BFYkIqAq8bltATuI zSxwgFmifWUAiC0s4CNxs7WJFcRmAar5dOoCWA2vgJPErd872CCWyUms2rgPbCangLPEni99 zBCLnSSe7N/HPoGRdwEjwypG0dTS5ILipPRcQ73ixNzi0rx0veT83E2MkHD+soNx8TGrQ4wC HIxKPLwfSn4HC7EmlhVX5h5ilOBgVhLh/ZH0J1iINyWxsiq1KD++qDQntfgQIxMHp1QD45KQ /ZF5jnfMX297/z1gEb//5xufozYpivmVO17kZPkRNn37Fper506zukd9XPzijVTpseVqK/vU lsxXy9Rf90gv/gn/vDnpBrNv13Sxb07/nDQx/5Zsoc2TpmRZr4eVN7Sjj4XFKZ3+p/FuSvbj Sqmlzhs2Pf95yrB2ucgSwZ9eqw7Naqz5Y6bEUpyRaKjFXFScCAArCj+7RQIAAA== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds device tree nodes for L2 cache controller present on Exynos4 SoCs. Signed-off-by: Tomasz Figa --- arch/arm/boot/dts/exynos4210.dtsi | 9 +++++++++ arch/arm/boot/dts/exynos4x12.dtsi | 14 ++++++++++++++ 2 files changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 807bb5b..8a182c4 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -64,6 +64,15 @@ reg = <0x10023CA0 0x20>; }; + l2c: l2-cache-controller@10502000 { + compatible = "arm,pl310-cache"; + reg = <0x10502000 0x1000>; + cache-unified; + cache-level = <2>; + arm,tag-latency = <2 2 1>; + arm,data-latency = <2 2 1>; + }; + gic: interrupt-controller@10490000 { cpu-offset = <0x8000>; }; diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 861bb91..c7adfd6 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -54,6 +54,20 @@ reg = <0x10023CA0 0x20>; }; + l2c: l2-cache-controller@10502000 { + compatible = "arm,pl310-cache"; + reg = <0x10502000 0x1000>; + cache-unified; + cache-level = <2>; + arm,tag-latency = <2 2 1>; + arm,data-latency = <3 2 1>; + arm,double-linefill = <1>; + arm,double-linefill-incr = <0>; + arm,double-linefill-wrap = <1>; + arm,prefetch-drop = <1>; + arm,prefetch-offset = <7>; + }; + clock: clock-controller@10030000 { compatible = "samsung,exynos4412-clock"; reg = <0x10030000 0x20000>; -- 2.0.4