From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755441AbaIBVVc (ORCPT ); Tue, 2 Sep 2014 17:21:32 -0400 Received: from mail-pa0-f44.google.com ([209.85.220.44]:33731 "EHLO mail-pa0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755324AbaIBVTa (ORCPT ); Tue, 2 Sep 2014 17:19:30 -0400 From: Soren Brinkmann To: Michal Simek , Daniel Lezcano Cc: Russell King , "Rafael J. Wysocki" , =?UTF-8?q?S=C3=B6ren=20Brinkmann?= , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Rob Herring , Mark Rutland , Pawel Moll , Ian Campbell , Kumar Gala Subject: [PATCH v2 3/9] ARM: zynq: DT: Add DDRC node Date: Tue, 2 Sep 2014 14:19:08 -0700 Message-Id: <1409692754-13437-4-git-send-email-soren.brinkmann@xilinx.com> X-Mailer: git-send-email 2.1.0.1.g27b9230 In-Reply-To: <1409692754-13437-1-git-send-email-soren.brinkmann@xilinx.com> References: <1409692754-13437-1-git-send-email-soren.brinkmann@xilinx.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the DDR controller to the Zynq devicetree. Signed-off-by: Soren Brinkmann --- arch/arm/boot/dts/zynq-7000.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 6cc83d4c6c76..587cadcf7001 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -146,6 +146,11 @@ cache-level = <2>; }; + memory-controller@f8006000 { + compatible = "xlnx,zynq-ddrc-a05"; + reg = <0xf8006000 0x1000>; + } ; + uart0: serial@e0000000 { compatible = "xlnx,xuartps", "cdns,uart-r1p8"; status = "disabled"; -- 2.1.0.1.g27b9230