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Message-ID: <1410391481.28990.317.camel@misato.fc.hp.com>
Subject: Re: [PATCH v2 2/6] x86, mm, pat: Change reserve_memtype() to handle
 WT
From: Toshi Kani <toshi.kani@hp.com>
To: "H. Peter Anvin" <hpa@zytor.com>
Cc: Andy Lutomirski <luto@amacapital.net>,
        Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@redhat.com>,
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Date: Wed, 10 Sep 2014 17:24:41 -0600
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On Wed, 2014-09-10 at 15:00 -0700, H. Peter Anvin wrote:
> On 09/10/2014 02:47 PM, Toshi Kani wrote:
> >>
> >> Yes.  Don't think of it as PAT vs non-PAT.  Think of it as a specific
> >> set of cache types available on different processors.  The fact that you
> >> may have to frob an MSR to initialize it is almost trivial in comparison.
> > 
> > Right.
> > 
> 
> In that sense the Xen "fixed PAT" fits right in.

Got it. Nicely simplified. :) 

Thanks,
-Toshi