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From: Keith Owens <kaos@ocs.com.au>
To: "Rinaldi J. Montessi" <rinaldij@adelphia.net>
Cc: linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: APIC revisited 
In-Reply-To: Your message of "Mon, 01 Oct 2001 18:56:16 -0400."
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Date: Tue, 02 Oct 2001 12:01:33 +1000
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On Mon, 01 Oct 2001 18:56:16 -0400, 
"Rinaldi J. Montessi" <rinaldij@adelphia.net> wrote:
>I am of the impression that with the noapic parameter all calls are to
>be handled via CPU0, yet I am getting several errors on CPU1 as well. 

noapic only affects external internal interrupts.  Inter processor
interrupts (IPIs) always use the APIC bus.  Ix86 SMP does a lot of
IPIs.