From: Andrew Bresticker <abrestic@chromium.org>
To: Ralf Baechle <ralf@linux-mips.org>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>,
Jeffrey Deans <jeffrey.deans@imgtec.com>,
Markos Chandras <markos.chandras@imgtec.com>,
Paul Burton <paul.burton@imgtec.com>,
Qais Yousef <qais.yousef@imgtec.com>,
Jonas Gorski <jogo@openwrt.org>,
John Crispin <blogic@openwrt.org>,
David Daney <ddaney.cavm@gmail.com>,
linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
Subject: [PATCH V2 01/24] MIPS: Always use IRQ domains for CPU IRQs
Date: Thu, 18 Sep 2014 14:47:07 -0700 [thread overview]
Message-ID: <1411076851-28242-2-git-send-email-abrestic@chromium.org> (raw)
In-Reply-To: <1411076851-28242-1-git-send-email-abrestic@chromium.org>
Use an IRQ domain for the 8 CPU IRQs in both the DT and non-DT cases.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
---
No changes from v1.
---
arch/mips/Kconfig | 1 +
arch/mips/kernel/irq_cpu.c | 36 +++++++++++-------------------------
2 files changed, 12 insertions(+), 25 deletions(-)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 900c7e5..9fc335c 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1051,6 +1051,7 @@ config MIPS_HUGE_TLB_SUPPORT
config IRQ_CPU
bool
+ select IRQ_DOMAIN
config IRQ_CPU_RM7K
bool
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index e498f2b..b097f7d 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -94,28 +94,6 @@ static struct irq_chip mips_mt_cpu_irq_controller = {
.irq_eoi = unmask_mips_irq,
};
-void __init mips_cpu_irq_init(void)
-{
- int irq_base = MIPS_CPU_IRQ_BASE;
- int i;
-
- /* Mask interrupts. */
- clear_c0_status(ST0_IM);
- clear_c0_cause(CAUSEF_IP);
-
- /* Software interrupts are used for MT/CMT IPI */
- for (i = irq_base; i < irq_base + 2; i++)
- irq_set_chip_and_handler(i, cpu_has_mipsmt ?
- &mips_mt_cpu_irq_controller :
- &mips_cpu_irq_controller,
- handle_percpu_irq);
-
- for (i = irq_base + 2; i < irq_base + 8; i++)
- irq_set_chip_and_handler(i, &mips_cpu_irq_controller,
- handle_percpu_irq);
-}
-
-#ifdef CONFIG_IRQ_DOMAIN
static int mips_cpu_intc_map(struct irq_domain *d, unsigned int irq,
irq_hw_number_t hw)
{
@@ -138,8 +116,7 @@ static const struct irq_domain_ops mips_cpu_intc_irq_domain_ops = {
.xlate = irq_domain_xlate_onecell,
};
-int __init mips_cpu_intc_init(struct device_node *of_node,
- struct device_node *parent)
+static void __init __mips_cpu_irq_init(struct device_node *of_node)
{
struct irq_domain *domain;
@@ -151,7 +128,16 @@ int __init mips_cpu_intc_init(struct device_node *of_node,
&mips_cpu_intc_irq_domain_ops, NULL);
if (!domain)
panic("Failed to add irqdomain for MIPS CPU");
+}
+
+void __init mips_cpu_irq_init(void)
+{
+ __mips_cpu_irq_init(NULL);
+}
+int __init mips_cpu_intc_init(struct device_node *of_node,
+ struct device_node *parent)
+{
+ __mips_cpu_irq_init(of_node);
return 0;
}
-#endif /* CONFIG_IRQ_DOMAIN */
--
2.1.0.rc2.206.gedb03e5
next prev parent reply other threads:[~2014-09-18 21:47 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-18 21:47 [PATCH V2 00/24] MIPS GIC cleanup, part 1 Andrew Bresticker
2014-09-18 21:47 ` Andrew Bresticker [this message]
2014-09-18 21:47 ` [PATCH V2 02/24] MIPS: Rename mips_cpu_intc_init() -> mips_cpu_irq_of_init() Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 03/24] MIPS: Provide a generic plat_irq_dispatch Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 04/24] MIPS: Set vint handler when mapping CPU interrupts Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 05/24] MIPS: i8259: Use IRQ domains Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 06/24] MIPS: Add hook to get C0 performance counter interrupt Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 07/24] MIPS: smp-cps: Enable all hardware interrupts on secondary CPUs Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 08/24] MIPS: Remove gic_{enable,disable}_interrupt() Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 09/24] MIPS: sead3: Remove sead3-serial.c Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 10/24] MIPS: sead3: Do not overlap CPU/GIC IRQ ranges Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 11/24] MIPS: Malta: Move MSC01 interrupt base Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 12/24] MIPS: Move MIPS_GIC_IRQ_BASE into platform irq.h Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 13/24] MIPS: Move GIC to drivers/irqchip/ Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 14/24] irqchip: mips-gic: Remove platform irq_ack/irq_eoi callbacks Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 15/24] irqchip: mips-gic: Implement irq_set_type callback Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 16/24] irqchip: mips-gic: Fix gic_set_affinity() return value Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 17/24] irqchip: mips-gic: Use IRQ domains Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 18/24] irqchip: mips-gic: Stop using per-platform mapping tables Andrew Bresticker
2015-01-15 11:59 ` James Hogan
2015-01-15 16:29 ` James Hogan
2015-01-15 16:36 ` Qais Yousef
2015-01-15 16:50 ` James Hogan
2015-01-15 16:58 ` Andrew Bresticker
2015-01-15 17:25 ` James Hogan
2014-09-18 21:47 ` [PATCH V2 19/24] irqchip: mips-gic: Probe for number of external interrupts Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 20/24] irqchip: mips-gic: Use separate edge/level irq_chips Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 21/24] irqchip: mips-gic: Support local interrupts Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 22/24] irqchip: mips-gic: Remove unnecessary globals Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 23/24] MIPS: Malta: Use generic plat_irq_dispatch Andrew Bresticker
2014-09-18 21:47 ` [PATCH V2 24/24] MIPS: sead3: " Andrew Bresticker
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