From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: tglx@linutronix.de, mingo@kernel.org
Cc: linux-kernel@vger.kernel.org
Subject: [PATCH 09/13] clocksource: cadence_ttc: Add support for 32bit mode
Date: Mon, 29 Sep 2014 02:23:42 +0200 [thread overview]
Message-ID: <1411950226-21598-9-git-send-email-daniel.lezcano@linaro.org> (raw)
In-Reply-To: <1411950226-21598-1-git-send-email-daniel.lezcano@linaro.org>
From: Michal Simek <michal.simek@xilinx.com>
New TTCs support 32bit mode. Older versions support
only 16bit modes. Keep 16bit mode as default
and 32bit optional.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
drivers/clocksource/cadence_ttc_timer.c | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/clocksource/cadence_ttc_timer.c b/drivers/clocksource/cadence_ttc_timer.c
index 7a08811..510c8a1 100644
--- a/drivers/clocksource/cadence_ttc_timer.c
+++ b/drivers/clocksource/cadence_ttc_timer.c
@@ -25,7 +25,7 @@
#include <linux/sched_clock.h>
/*
- * This driver configures the 2 16-bit count-up timers as follows:
+ * This driver configures the 2 16/32-bit count-up timers as follows:
*
* T1: Timer 1, clocksource for generic timekeeping
* T2: Timer 2, clockevent source for hrtimers
@@ -321,7 +321,8 @@ static int ttc_rate_change_clocksource_cb(struct notifier_block *nb,
return NOTIFY_DONE;
}
-static void __init ttc_setup_clocksource(struct clk *clk, void __iomem *base)
+static void __init ttc_setup_clocksource(struct clk *clk, void __iomem *base,
+ u32 timer_width)
{
struct ttc_timer_clocksource *ttccs;
int err;
@@ -351,7 +352,7 @@ static void __init ttc_setup_clocksource(struct clk *clk, void __iomem *base)
ttccs->cs.name = "ttc_clocksource";
ttccs->cs.rating = 200;
ttccs->cs.read = __ttc_clocksource_read;
- ttccs->cs.mask = CLOCKSOURCE_MASK(16);
+ ttccs->cs.mask = CLOCKSOURCE_MASK(timer_width);
ttccs->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
/*
@@ -372,7 +373,8 @@ static void __init ttc_setup_clocksource(struct clk *clk, void __iomem *base)
}
ttc_sched_clock_val_reg = base + TTC_COUNT_VAL_OFFSET;
- sched_clock_register(ttc_sched_clock_read, 16, ttccs->ttc.freq / PRESCALE);
+ sched_clock_register(ttc_sched_clock_read, timer_width,
+ ttccs->ttc.freq / PRESCALE);
}
static int ttc_rate_change_clockevent_cb(struct notifier_block *nb,
@@ -467,6 +469,7 @@ static void __init ttc_timer_init(struct device_node *timer)
struct clk *clk_cs, *clk_ce;
static int initialized;
int clksel;
+ u32 timer_width = 16;
if (initialized)
return;
@@ -490,6 +493,8 @@ static void __init ttc_timer_init(struct device_node *timer)
BUG();
}
+ of_property_read_u32(timer, "timer-width", &timer_width);
+
clksel = readl_relaxed(timer_baseaddr + TTC_CLK_CNTRL_OFFSET);
clksel = !!(clksel & TTC_CLK_CNTRL_CSRC_MASK);
clk_cs = of_clk_get(timer, clksel);
@@ -506,7 +511,7 @@ static void __init ttc_timer_init(struct device_node *timer)
BUG();
}
- ttc_setup_clocksource(clk_cs, timer_baseaddr);
+ ttc_setup_clocksource(clk_cs, timer_baseaddr, timer_width);
ttc_setup_clockevent(clk_ce, timer_baseaddr + 4, irq);
pr_info("%s #0 at %p, irq=%d\n", timer->name, timer_baseaddr, irq);
--
1.9.1
next prev parent reply other threads:[~2014-09-29 0:24 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-29 0:18 [GIT PULL] : clockevents/clocksource for 3.18 Daniel Lezcano
2014-09-29 0:23 ` [PATCH 01/13] clocksource: sh_cmt: Document SoC specific bindings Daniel Lezcano
2014-09-29 0:23 ` [PATCH 02/13] clocksource: sh_mtu2: Document r7s72100 binding Daniel Lezcano
2014-09-29 0:23 ` [PATCH 03/13] clocksource: sh_tmu: Document r8a7779 binding Daniel Lezcano
2014-09-29 0:23 ` [PATCH 04/13] ARM: meson: documentation: Add timer documentation Daniel Lezcano
2014-09-29 0:23 ` [PATCH 05/13] ARM: meson6: clocksource: Add Meson6 timer support Daniel Lezcano
2014-09-29 0:23 ` [PATCH 06/13] clocksource: vf_pit_timer: Support shutdown mode Daniel Lezcano
2014-09-29 0:23 ` [PATCH 07/13] clocksource: arm_arch_timer: Discard unavailable timers correctly Daniel Lezcano
2014-09-29 0:23 ` [PATCH 08/13] clocksource: tcb_clksrc: Sanitize IRQ request Daniel Lezcano
2014-09-29 0:23 ` Daniel Lezcano [this message]
2014-09-29 0:23 ` [PATCH 10/13] clocksource: sirf: Disable counter before re-setting it Daniel Lezcano
2014-09-29 0:23 ` [PATCH 11/13] clocksource: arm_arch_timer: Change clocksource name if CP15 unavailable Daniel Lezcano
2014-09-29 0:23 ` [PATCH 12/13] clocksource: arm_arch_timer: Enable counter access for 32-bit ARM Daniel Lezcano
2014-09-29 0:23 ` [PATCH 13/13] clocksource: arm_arch_timer: Consolidate arch_timer_evtstrm_enable Daniel Lezcano
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