From: Kevin Cernekee <cernekee@gmail.com>
To: arnd@arndb.de, f.fainelli@gmail.com, tglx@linutronix.de,
jason@lakedaemon.net, ralf@linux-mips.org, lethal@linux-sh.org
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
mbizon@freebox.fr, jogo@openwrt.org, linux-mips@linux-mips.org
Subject: [PATCH V2 06/15] genirq: Generic chip: Optimize for fixed-endian systems
Date: Wed, 29 Oct 2014 19:17:59 -0700 [thread overview]
Message-ID: <1414635488-14137-7-git-send-email-cernekee@gmail.com> (raw)
In-Reply-To: <1414635488-14137-1-git-send-email-cernekee@gmail.com>
Allow the compiler to inline an LE MMIO access if the configuration only
supports LE registers, or a BE MMIO access if the configuration only
supports BE registers. If the configuration supports both (possibly
a multiplatform kernel) then make the decision at runtime.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
---
kernel/irq/Kconfig | 5 +++++
kernel/irq/Makefile | 1 +
kernel/irq/generic-chip.c | 10 +++++++++-
3 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/kernel/irq/Kconfig b/kernel/irq/Kconfig
index 225086b..6283c8c 100644
--- a/kernel/irq/Kconfig
+++ b/kernel/irq/Kconfig
@@ -51,6 +51,11 @@ config GENERIC_IRQ_CHIP
bool
select IRQ_DOMAIN
+# Same as above, but use big-endian MMIO accesses
+config GENERIC_IRQ_CHIP_BE
+ bool
+ select IRQ_DOMAIN
+
# Generic irq_domain hw <--> linux irq number translation
config IRQ_DOMAIN
bool
diff --git a/kernel/irq/Makefile b/kernel/irq/Makefile
index fff1738..34c2b0f 100644
--- a/kernel/irq/Makefile
+++ b/kernel/irq/Makefile
@@ -1,6 +1,7 @@
obj-y := irqdesc.o handle.o manage.o spurious.o resend.o chip.o dummychip.o devres.o
obj-$(CONFIG_GENERIC_IRQ_CHIP) += generic-chip.o
+obj-$(CONFIG_GENERIC_IRQ_CHIP_BE) += generic-chip.o
obj-$(CONFIG_GENERIC_IRQ_PROBE) += autoprobe.o
obj-$(CONFIG_IRQ_DOMAIN) += irqdomain.o
obj-$(CONFIG_PROC_FS) += proc.o
diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c
index c1890bb..457ea48 100644
--- a/kernel/irq/generic-chip.c
+++ b/kernel/irq/generic-chip.c
@@ -9,6 +9,7 @@
#include <linux/export.h>
#include <linux/irqdomain.h>
#include <linux/interrupt.h>
+#include <linux/kconfig.h>
#include <linux/kernel_stat.h>
#include <linux/syscore_ops.h>
@@ -19,7 +20,14 @@ static DEFINE_RAW_SPINLOCK(gc_lock);
static int is_big_endian(struct irq_chip_generic *gc)
{
- return !!(gc->domain->gc->gc_flags & IRQ_GC_BE_IO);
+ if (IS_ENABLED(CONFIG_GENERIC_IRQ_CHIP) &&
+ !IS_ENABLED(CONFIG_GENERIC_IRQ_CHIP_BE))
+ return 0;
+ else if (IS_ENABLED(CONFIG_GENERIC_IRQ_CHIP_BE) &&
+ !IS_ENABLED(CONFIG_GENERIC_IRQ_CHIP))
+ return 1;
+ else
+ return !!(gc->domain->gc->gc_flags & IRQ_GC_BE_IO);
}
static void irq_reg_writel(struct irq_chip_generic *gc,
--
2.1.1
next prev parent reply other threads:[~2014-10-30 2:19 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-30 2:17 [PATCH V2 00/15] genirq endian fixes; bcm7120/brcmstb IRQ updates Kevin Cernekee
2014-10-30 2:17 ` [PATCH V2 01/15] irqchip: Replace irq_reg_{readl,writel} with {readl,writel} Kevin Cernekee
2014-10-30 2:17 ` [PATCH V2 02/15] sh: Eliminate unused irq_reg_{readl,writel} accessors Kevin Cernekee
2014-10-30 9:00 ` Arnd Bergmann
2014-10-30 10:43 ` Thomas Gleixner
2014-10-30 10:48 ` Arnd Bergmann
2014-10-30 15:25 ` Kevin Cernekee
2014-10-30 2:17 ` [PATCH V2 03/15] genirq: Generic chip: Move irq_reg_{readl,writel} accessors into generic-chip.c Kevin Cernekee
2014-10-30 8:43 ` Thomas Gleixner
2014-10-30 9:06 ` Arnd Bergmann
2014-10-30 10:33 ` Thomas Gleixner
2014-10-30 11:50 ` Thomas Gleixner
2014-10-30 2:17 ` [PATCH V2 04/15] genirq: Generic chip: Change irq_reg_{readl,writel} arguments Kevin Cernekee
2014-10-30 2:17 ` [PATCH V2 05/15] genirq: Generic chip: Add big endian I/O accessors Kevin Cernekee
2014-10-30 9:21 ` Arnd Bergmann
2014-10-30 12:30 ` Thomas Gleixner
2014-10-30 12:40 ` Arnd Bergmann
2014-10-30 2:17 ` Kevin Cernekee [this message]
2014-10-30 4:16 ` [PATCH V2 06/15] genirq: Generic chip: Optimize for fixed-endian systems Brian Norris
2014-10-30 9:04 ` Arnd Bergmann
2014-10-30 2:18 ` [PATCH V2 07/15] irqchip: brcmstb-l2: Eliminate dependency on ARM code Kevin Cernekee
2014-10-30 2:18 ` [PATCH V2 08/15] irqchip: bcm7120-l2: Eliminate bad IRQ check Kevin Cernekee
2014-10-30 11:09 ` Sergei Shtylyov
2014-10-30 19:24 ` Kevin Cernekee
2014-10-30 2:18 ` [PATCH V2 09/15] irqchip: Remove ARM dependency for bcm7120-l2 and brcmstb-l2 Kevin Cernekee
2014-10-30 11:10 ` Sergei Shtylyov
2014-10-30 11:24 ` Arnd Bergmann
2014-10-30 11:48 ` Sergei Shtylyov
2014-10-30 2:18 ` [PATCH V2 10/15] irqchip: bcm7120-l2: Make sure all register accesses use base+offset Kevin Cernekee
2014-10-30 9:12 ` Arnd Bergmann
2014-10-30 2:18 ` [PATCH V2 11/15] irqchip: bcm7120-l2: Fix missing nibble in gc->unused mask Kevin Cernekee
2014-10-30 2:18 ` [PATCH V2 12/15] irqchip: bcm7120-l2: Use gc->mask_cache to simplify suspend/resume functions Kevin Cernekee
2014-10-30 2:18 ` [PATCH V2 13/15] irqchip: bcm7120-l2: Extend driver to support 64+ bit controllers Kevin Cernekee
2014-10-30 2:18 ` [PATCH V2 14/15] irqchip: Decouple bcm7120-l2 from brcmstb-l2 Kevin Cernekee
2014-10-30 2:18 ` [PATCH V2 15/15] irqchip: bcm7120-l2: Enable big endian register accesses on BE kernels Kevin Cernekee
2014-10-30 9:03 ` Arnd Bergmann
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