From: Juergen Gross <jgross@suse.com>
To: hpa@zytor.com, x86@kernel.org, tglx@linutronix.de,
mingo@redhat.com, stefan.bader@canonical.com,
linux-kernel@vger.kernel.org, xen-devel@lists.xensource.com,
konrad.wilk@oracle.com, ville.syrjala@linux.intel.com,
david.vrabel@citrix.com, jbeulich@suse.com, toshi.kani@hp.com,
plagnioj@jcrosoft.com, tomi.valkeinen@ti.com,
bhelgaas@google.com
Cc: Juergen Gross <jgross@suse.com>
Subject: [PATCH V6 11/18] x86: Use new cache mode type in setting page attributes
Date: Mon, 3 Nov 2014 14:01:57 +0100 [thread overview]
Message-ID: <1415019724-4317-12-git-send-email-jgross@suse.com> (raw)
In-Reply-To: <1415019724-4317-1-git-send-email-jgross@suse.com>
Instead of directly using the cache mode bits in the pte switch to
using the cache mode type in the functions for modifying page
attributes.
Based-on-patch-by: Stefan Bader <stefan.bader@canonical.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/mm/pageattr.c | 52 +++++++++++++++++++++++++++-----------------------
1 file changed, 28 insertions(+), 24 deletions(-)
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 87c0d36..9f7e1b4 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -1304,12 +1304,6 @@ static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
return 0;
}
-static inline int cache_attr(pgprot_t attr)
-{
- return pgprot_val(attr) &
- (_PAGE_PAT | _PAGE_PWT | _PAGE_PCD);
-}
-
static int change_page_attr_set_clr(unsigned long *addr, int numpages,
pgprot_t mask_set, pgprot_t mask_clr,
int force_split, int in_flag,
@@ -1390,7 +1384,7 @@ static int change_page_attr_set_clr(unsigned long *addr, int numpages,
* No need to flush, when we did not set any of the caching
* attributes:
*/
- cache = cache_attr(mask_set);
+ cache = !!pgprot2cachemode(mask_set);
/*
* On success we use CLFLUSH, when the CPU supports it to
@@ -1445,7 +1439,8 @@ int _set_memory_uc(unsigned long addr, int numpages)
* for now UC MINUS. see comments in ioremap_nocache()
*/
return change_page_attr_set(&addr, numpages,
- __pgprot(_PAGE_CACHE_UC_MINUS), 0);
+ cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
+ 0);
}
int set_memory_uc(unsigned long addr, int numpages)
@@ -1474,7 +1469,7 @@ out_err:
EXPORT_SYMBOL(set_memory_uc);
static int _set_memory_array(unsigned long *addr, int addrinarray,
- unsigned long new_type)
+ enum page_cache_mode new_type)
{
int i, j;
int ret;
@@ -1484,17 +1479,19 @@ static int _set_memory_array(unsigned long *addr, int addrinarray,
*/
for (i = 0; i < addrinarray; i++) {
ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
- new_type, NULL);
+ cachemode2protval(new_type), NULL);
if (ret)
goto out_free;
}
ret = change_page_attr_set(addr, addrinarray,
- __pgprot(_PAGE_CACHE_UC_MINUS), 1);
+ cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
+ 1);
- if (!ret && new_type == _PAGE_CACHE_WC)
+ if (!ret && new_type == _PAGE_CACHE_MODE_WC)
ret = change_page_attr_set_clr(addr, addrinarray,
- __pgprot(_PAGE_CACHE_WC),
+ cachemode2pgprot(
+ _PAGE_CACHE_MODE_WC),
__pgprot(_PAGE_CACHE_MASK),
0, CPA_ARRAY, NULL);
if (ret)
@@ -1511,13 +1508,13 @@ out_free:
int set_memory_array_uc(unsigned long *addr, int addrinarray)
{
- return _set_memory_array(addr, addrinarray, _PAGE_CACHE_UC_MINUS);
+ return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
}
EXPORT_SYMBOL(set_memory_array_uc);
int set_memory_array_wc(unsigned long *addr, int addrinarray)
{
- return _set_memory_array(addr, addrinarray, _PAGE_CACHE_WC);
+ return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
}
EXPORT_SYMBOL(set_memory_array_wc);
@@ -1527,10 +1524,12 @@ int _set_memory_wc(unsigned long addr, int numpages)
unsigned long addr_copy = addr;
ret = change_page_attr_set(&addr, numpages,
- __pgprot(_PAGE_CACHE_UC_MINUS), 0);
+ cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
+ 0);
if (!ret) {
ret = change_page_attr_set_clr(&addr_copy, numpages,
- __pgprot(_PAGE_CACHE_WC),
+ cachemode2pgprot(
+ _PAGE_CACHE_MODE_WC),
__pgprot(_PAGE_CACHE_MASK),
0, 0, NULL);
}
@@ -1564,6 +1563,7 @@ EXPORT_SYMBOL(set_memory_wc);
int _set_memory_wb(unsigned long addr, int numpages)
{
+ /* WB cache mode is hard wired to all cache attribute bits being 0 */
return change_page_attr_clear(&addr, numpages,
__pgprot(_PAGE_CACHE_MASK), 0);
}
@@ -1586,6 +1586,7 @@ int set_memory_array_wb(unsigned long *addr, int addrinarray)
int i;
int ret;
+ /* WB cache mode is hard wired to all cache attribute bits being 0 */
ret = change_page_attr_clear(addr, addrinarray,
__pgprot(_PAGE_CACHE_MASK), 1);
if (ret)
@@ -1648,7 +1649,7 @@ int set_pages_uc(struct page *page, int numpages)
EXPORT_SYMBOL(set_pages_uc);
static int _set_pages_array(struct page **pages, int addrinarray,
- unsigned long new_type)
+ enum page_cache_mode new_type)
{
unsigned long start;
unsigned long end;
@@ -1661,15 +1662,17 @@ static int _set_pages_array(struct page **pages, int addrinarray,
continue;
start = page_to_pfn(pages[i]) << PAGE_SHIFT;
end = start + PAGE_SIZE;
- if (reserve_memtype(start, end, new_type, NULL))
+ if (reserve_memtype(start, end, cachemode2protval(new_type),
+ NULL))
goto err_out;
}
ret = cpa_set_pages_array(pages, addrinarray,
- __pgprot(_PAGE_CACHE_UC_MINUS));
- if (!ret && new_type == _PAGE_CACHE_WC)
+ cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS));
+ if (!ret && new_type == _PAGE_CACHE_MODE_WC)
ret = change_page_attr_set_clr(NULL, addrinarray,
- __pgprot(_PAGE_CACHE_WC),
+ cachemode2pgprot(
+ _PAGE_CACHE_MODE_WC),
__pgprot(_PAGE_CACHE_MASK),
0, CPA_PAGES_ARRAY, pages);
if (ret)
@@ -1689,13 +1692,13 @@ err_out:
int set_pages_array_uc(struct page **pages, int addrinarray)
{
- return _set_pages_array(pages, addrinarray, _PAGE_CACHE_UC_MINUS);
+ return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
}
EXPORT_SYMBOL(set_pages_array_uc);
int set_pages_array_wc(struct page **pages, int addrinarray)
{
- return _set_pages_array(pages, addrinarray, _PAGE_CACHE_WC);
+ return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
}
EXPORT_SYMBOL(set_pages_array_wc);
@@ -1714,6 +1717,7 @@ int set_pages_array_wb(struct page **pages, int addrinarray)
unsigned long end;
int i;
+ /* WB cache mode is hard wired to all cache attribute bits being 0 */
retval = cpa_clear_pages_array(pages, addrinarray,
__pgprot(_PAGE_CACHE_MASK));
if (retval)
--
1.8.4.5
next prev parent reply other threads:[~2014-11-03 13:05 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-03 13:01 [PATCH V6 00/18] x86: Full support of PAT Juergen Gross
2014-11-03 13:01 ` [PATCH V6 01/18] x86: Make page cache mode a real type Juergen Gross
2014-11-16 10:54 ` [tip:x86/mm] " tip-bot for Juergen Gross
2015-01-22 7:11 ` [PATCH V6 01/18] " Steven Noonan
2015-01-22 10:15 ` Juergen Gross
2015-01-22 11:06 ` Thomas Gleixner
2015-01-22 11:11 ` Juergen Gross
2014-11-03 13:01 ` [PATCH V6 02/18] x86: Use new cache mode type in include/asm/fb.h Juergen Gross
2014-11-16 10:54 ` [tip:x86/mm] " tip-bot for Juergen Gross
2014-11-03 13:01 ` [PATCH V6 03/18] x86: Use new cache mode type in drivers/video/fbdev/gbefb.c Juergen Gross
2014-11-07 8:16 ` Tomi Valkeinen
2014-11-16 10:55 ` [tip:x86/mm] x86: Use new cache mode type in drivers/video/fbdev/ gbefb.c tip-bot for Juergen Gross
2014-11-03 13:01 ` [PATCH V6 04/18] x86: Use new cache mode type in drivers/video/fbdev/vermilion Juergen Gross
2014-11-16 10:55 ` [tip:x86/mm] x86: Use new cache mode type in drivers/video/fbdev/ vermilion tip-bot for Juergen Gross
2014-11-03 13:01 ` [PATCH V6 05/18] x86: Use new cache mode type in arch/x86/pci Juergen Gross
2014-11-16 10:55 ` [tip:x86/mm] " tip-bot for Juergen Gross
2014-11-03 13:01 ` [PATCH V6 06/18] x86: Use new cache mode type in arch/x86/mm/init_64.c Juergen Gross
2014-11-16 10:55 ` [tip:x86/mm] x86: Use new cache mode type in arch/x86/mm/ init_64.c tip-bot for Juergen Gross
2014-11-03 13:01 ` [PATCH V6 07/18] x86: Use new cache mode type in asm/pgtable.h Juergen Gross
2014-11-16 10:56 ` [tip:x86/mm] " tip-bot for Juergen Gross
2014-11-03 13:01 ` [PATCH V6 08/18] x86: Use new cache mode type in mm/iomap_32.c Juergen Gross
2014-11-16 10:56 ` [tip:x86/mm] " tip-bot for Juergen Gross
2014-11-03 13:01 ` [PATCH V6 09/18] x86: Use new cache mode type in track_pfn_remap() and track_pfn_insert() Juergen Gross
2014-11-16 10:56 ` [tip:x86/mm] " tip-bot for Juergen Gross
2014-11-03 13:01 ` [PATCH V6 10/18] x86: Remove looking for setting of _PAGE_PAT_LARGE in pageattr.c Juergen Gross
2014-11-03 16:44 ` Thomas Gleixner
2014-11-16 10:57 ` [tip:x86/mm] " tip-bot for Juergen Gross
2014-11-03 13:01 ` Juergen Gross [this message]
2014-11-16 10:57 ` [tip:x86/mm] x86: Use new cache mode type in setting page attributes tip-bot for Juergen Gross
2014-11-03 13:01 ` [PATCH V6 12/18] x86: Use new cache mode type in mm/ioremap.c Juergen Gross
2014-11-16 10:57 ` [tip:x86/mm] " tip-bot for Juergen Gross
2014-11-03 13:01 ` [PATCH V6 13/18] x86: Use new cache mode type in memtype related functions Juergen Gross
2014-11-16 10:57 ` [tip:x86/mm] " tip-bot for Juergen Gross
2014-11-03 13:02 ` [PATCH V6 14/18] x86: Clean up pgtable_types.h Juergen Gross
2014-11-16 10:58 ` [tip:x86/mm] " tip-bot for Juergen Gross
2014-11-03 13:02 ` [PATCH V6 15/18] x86: Support PAT bit in pagetable dump for lower levels Juergen Gross
2014-11-16 10:58 ` [tip:x86/mm] " tip-bot for Juergen Gross
2014-11-03 13:02 ` [PATCH V6 16/18] x86: Respect PAT bit when copying pte values between large and normal pages Juergen Gross
2014-11-16 10:58 ` [tip:x86/mm] " tip-bot for Juergen Gross
2014-11-03 13:02 ` [PATCH V6 17/18] x86: Enable PAT to use cache mode translation tables Juergen Gross
2014-11-16 10:58 ` [tip:x86/mm] " tip-bot for Juergen Gross
2014-11-03 13:02 ` [PATCH V6 18/18] xen: Support Xen pv-domains using PAT Juergen Gross
2014-11-16 10:59 ` [tip:x86/mm] " tip-bot for Juergen Gross
2014-11-03 16:43 ` [PATCH V6 00/18] x86: Full support of PAT Toshi Kani
2014-11-14 6:30 ` Juergen Gross
2014-11-16 13:08 ` Ingo Molnar
2014-11-17 4:42 ` Jürgen Groß
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