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From: Alexander Shishkin <alexander.shishkin@linux.intel.com>
To: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Ingo Molnar <mingo@redhat.com>,
	linux-kernel@vger.kernel.org, Robert Richter <rric@kernel.org>,
	Frederic Weisbecker <fweisbec@gmail.com>,
	Mike Galbraith <efault@gmx.de>, Paul Mackerras <paulus@samba.org>,
	Stephane Eranian <eranian@google.com>,
	Andi Kleen <ak@linux.intel.com>,
	kan.liang@intel.com, adrian.hunter@intel.com,
	markus.t.metzger@intel.com, mathieu.poirier@linaro.org,
	acme@infradead.org,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>
Subject: [PATCH v6 04/14] perf: Add a capability for AUX_NO_SG pmus to do software double buffering
Date: Tue, 11 Nov 2014 13:26:50 +0200	[thread overview]
Message-ID: <1415705221-182873-5-git-send-email-alexander.shishkin@linux.intel.com> (raw)
In-Reply-To: <1415705221-182873-1-git-send-email-alexander.shishkin@linux.intel.com>

For pmus that don't support scatter-gather for AUX data in hardware, it
might still make sense to implement software double buffering to avoid
losing data while the user is reading data out. For this purpose, add
a pmu capability that guarantees multiple high-order chunks for AUX buffer,
so that the pmu driver can do switchover tricks.

To make use of this feature, add PERF_PMU_CAP_AUX_SW_DOUBLEBUF to your
pmu's capability mask. This will make the ring buffer AUX allocation code
ensure that the biggest high order allocation for the aux buffer pages is
no bigger than half of the total requested buffer size, thus making sure
that the buffer has at least two high order allocations.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
---
 include/linux/perf_event.h  |  1 +
 kernel/events/ring_buffer.c | 15 ++++++++++++++-
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index 71df948b4d..e7a15f5c3f 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -172,6 +172,7 @@ struct perf_event;
  */
 #define PERF_PMU_CAP_NO_INTERRUPT		0x01
 #define PERF_PMU_CAP_AUX_NO_SG			0x02
+#define PERF_PMU_CAP_AUX_SW_DOUBLEBUF		0x04
 
 /**
  * struct pmu - generic performance monitoring unit
diff --git a/kernel/events/ring_buffer.c b/kernel/events/ring_buffer.c
index c3c92757ce..61865a2ec6 100644
--- a/kernel/events/ring_buffer.c
+++ b/kernel/events/ring_buffer.c
@@ -286,9 +286,22 @@ int rb_alloc_aux(struct ring_buffer *rb, struct perf_event *event,
 	if (!has_aux(event))
 		return -ENOTSUPP;
 
-	if (event->pmu->capabilities & PERF_PMU_CAP_AUX_NO_SG)
+	if (event->pmu->capabilities & PERF_PMU_CAP_AUX_NO_SG) {
 		max_order = get_order(nr_pages * PAGE_SIZE);
 
+		/*
+		 * PMU requests more than one contiguous chunks of memory
+		 * for SW double buffering
+		 */
+		if ((event->pmu->capabilities & PERF_PMU_CAP_AUX_SW_DOUBLEBUF) &&
+		    !overwrite) {
+			if (!max_order)
+				return -EINVAL;
+
+			max_order--;
+		}
+	}
+
 	rb->aux_pages = kzalloc_node(nr_pages * sizeof(void *), GFP_KERNEL, node);
 	if (!rb->aux_pages)
 		return -ENOMEM;
-- 
2.1.1


  parent reply	other threads:[~2014-11-11 11:27 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-11 11:26 [PATCH v6 00/14] perf: Add infrastructure and support for Intel PT Alexander Shishkin
2014-11-11 11:26 ` [PATCH v6 01/14] perf: Add data_{offset,size} to user_page Alexander Shishkin
2014-11-11 11:26 ` [PATCH v6 02/14] perf: Add AUX area to ring buffer for raw data streams Alexander Shishkin
2014-11-11 11:26 ` [PATCH v6 03/14] perf: Support high-order allocations for AUX space Alexander Shishkin
2014-11-11 11:26 ` Alexander Shishkin [this message]
2014-11-11 11:26 ` [PATCH v6 05/14] perf: Add a pmu capability for "exclusive" events Alexander Shishkin
2014-11-11 11:26 ` [PATCH v6 06/14] perf: Add AUX record Alexander Shishkin
2014-11-11 11:26 ` [PATCH v6 07/14] perf: Add api for pmus to write to AUX area Alexander Shishkin
2014-11-11 11:26 ` [PATCH v6 08/14] perf: Support overwrite mode for " Alexander Shishkin
2014-11-11 11:26 ` [PATCH v6 09/14] perf: Add wakeup watermark control to " Alexander Shishkin
2014-11-11 11:26 ` [PATCH v6 10/14] x86: Add Intel Processor Trace (INTEL_PT) cpu feature detection Alexander Shishkin
2014-11-11 11:26 ` [PATCH v6 11/14] x86: perf: Intel PT and LBR/BTS are mutually exclusive Alexander Shishkin
2014-11-11 11:26 ` [PATCH v6 12/14] x86: perf: intel_pt: Intel PT PMU driver Alexander Shishkin
2014-11-11 11:26 ` [PATCH v6 13/14] x86: perf: intel_bts: Add BTS " Alexander Shishkin
2014-11-11 11:27 ` [PATCH v6 14/14] perf: add ITRACE_START record to indicate that tracing has started Alexander Shishkin
2014-11-11 14:18 ` [PATCH v6 00/14] perf: Add infrastructure and support for Intel PT Alexander Shishkin

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