mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Kevin Cernekee <cernekee@gmail.com>
To: ralf@linux-mips.org
Cc: f.fainelli@gmail.com, jfraser@broadcom.com, dtor@chromium.org,
	tglx@linutronix.de, jason@lakedaemon.net, jogo@openwrt.org,
	arnd@arndb.de, computersforpeace@gmail.com,
	linux-mips@linux-mips.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH V4 14/16] MIPS: BMIPS: Document the firmware->kernel DTB interface
Date: Thu, 27 Nov 2014 20:32:20 -0800	[thread overview]
Message-ID: <1417149142-3756-15-git-send-email-cernekee@gmail.com> (raw)
In-Reply-To: <1417149142-3756-1-git-send-email-cernekee@gmail.com>

Add a new section covering the Generic BMIPS machine type.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
---
 Documentation/devicetree/booting-without-of.txt | 28 +++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/Documentation/devicetree/booting-without-of.txt b/Documentation/devicetree/booting-without-of.txt
index 77685185cf3b..e49e423268c0 100644
--- a/Documentation/devicetree/booting-without-of.txt
+++ b/Documentation/devicetree/booting-without-of.txt
@@ -15,6 +15,7 @@ Table of Contents
     1) Entry point for arch/arm
     2) Entry point for arch/powerpc
     3) Entry point for arch/x86
+    4) Entry point for arch/mips/bmips
 
   II - The DT block format
     1) Header
@@ -288,6 +289,33 @@ it with special cases.
   or initrd address. It simply holds information which can not be retrieved
   otherwise like interrupt routing or a list of devices behind an I2C bus.
 
+4) Entry point for arch/mips/bmips
+----------------------------------
+
+  Some bootloaders only support a single entry point, at the start of the
+  kernel image.  Other bootloaders will jump to the ELF start address.
+  Both schemes are supported; CONFIG_BOOT_RAW=y and CONFIG_NO_EXCEPT_FILL=y,
+  so the first instruction immediately jumps to kernel_entry().
+
+  Similar to the arch/arm case (b), a DT-aware bootloader is expected to
+  set up the following registers:
+
+         a0 : 0
+
+         a1 : 0xffffffff
+
+         a2 : Physical pointer to the device tree block (defined in chapter
+         II) in RAM.  The device tree can be located anywhere in the first
+         512MB of the physical address space (0x00000000 - 0x1fffffff),
+         aligned on a 64 bit boundary.
+
+  Legacy bootloaders do not use this convention, and they do not pass in a
+  DT block.  In this case, Linux will look for a builtin DTB, selected via
+  CONFIG_DT_*.
+
+  This convention is defined for 32-bit systems only, as there are not
+  currently any 64-bit BMIPS implementations.
+
 II - The DT block format
 ========================
 
-- 
2.1.0


  parent reply	other threads:[~2014-11-28  4:33 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-28  4:32 [PATCH V4 00/16] Generic BMIPS kernel Kevin Cernekee
2014-11-28  4:32 ` [PATCH V4 01/16] irqchip: Update docs regarding irq_domain_add_tree() Kevin Cernekee
2014-11-28  4:32 ` [PATCH V4 02/16] irqchip: brcmstb-l2: don't clear wakeable interrupts at init time Kevin Cernekee
2014-11-28  4:32 ` [PATCH V4 03/16] irqchip: brcmstb-l2: fix error handling of irq_of_parse_and_map Kevin Cernekee
2014-11-28  4:32 ` [PATCH V4 04/16] irqchip: bcm7120-l2: " Kevin Cernekee
2014-11-28  4:32 ` [PATCH V4 05/16] irqchip: bcm7120-l2: Refactor driver for arbitrary IRQEN/IRQSTAT offsets Kevin Cernekee
2014-11-28  4:32 ` [PATCH V4 06/16] irqchip: bcm7120-l2: Split STB-specific logic into its own function Kevin Cernekee
2014-11-28  4:32 ` [PATCH V4 07/16] irqchip: bcm7120-l2: Add support for BCM3380-style controllers Kevin Cernekee
2014-11-28  4:32 ` [PATCH V4 08/16] irqchip: Add new driver for BCM7038-style level 1 interrupt controllers Kevin Cernekee
2014-12-01 16:09   ` Jonas Gorski
2014-12-01 17:39     ` Kevin Cernekee
2014-11-28  4:32 ` [PATCH V4 09/16] MIPS: Let __dt_register_buses accept a single bus type Kevin Cernekee
2014-11-28  4:32 ` [PATCH V4 10/16] MIPS: Fall back to the generic restart notifier Kevin Cernekee
2014-11-28  4:32 ` [PATCH V4 11/16] MIPS: Reorder MIPS_L1_CACHE_SHIFT priorities Kevin Cernekee
2014-11-28  4:32 ` [PATCH V4 12/16] MIPS: Create a common <asm/mach-generic/war.h> Kevin Cernekee
2014-11-28  4:32 ` [PATCH V4 13/16] MIPS: BMIPS: Flush the readahead cache after DMA Kevin Cernekee
2014-11-28  4:32 ` Kevin Cernekee [this message]
2014-11-28  4:32 ` [PATCH V4 15/16] MIPS: Add Generic BMIPS target Kevin Cernekee
2014-11-28  4:32 ` [PATCH V4 16/16] MIPS: BMIPS: Add DTS files for several platforms Kevin Cernekee

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1417149142-3756-15-git-send-email-cernekee@gmail.com \
    --to=cernekee@gmail.com \
    --cc=arnd@arndb.de \
    --cc=computersforpeace@gmail.com \
    --cc=devicetree@vger.kernel.org \
    --cc=dtor@chromium.org \
    --cc=f.fainelli@gmail.com \
    --cc=jason@lakedaemon.net \
    --cc=jfraser@broadcom.com \
    --cc=jogo@openwrt.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mips@linux-mips.org \
    --cc=ralf@linux-mips.org \
    --cc=tglx@linutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®