From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: linux-kernel@vger.kernel.org, Ingo Molnar <mingo@redhat.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Jiang Liu <jiang.liu@linux.intel.com>,
Joerg Roedel <joro@8bytes.org>,
David Cohen <david.a.cohen@linux.intel.com>,
Thomas Gleixner <tglx@linutronix.de>
Subject: [PATCH v1] x86, ioapic: fix kernel crash on boot on non-PC platforms
Date: Wed, 10 Dec 2014 20:29:25 +0200 [thread overview]
Message-ID: <1418236165-13961-1-git-send-email-andriy.shevchenko@linux.intel.com> (raw)
Intel MID platforms have no legacy IRQ support. The commit bfa644bfa9e3 (x86,
irq: Convert IOAPIC to use hierarchy irqdomain interfaces) introduces new
scheme of allocating IRQs for IOAPIC, though it maps a pin disregarding whether
or not the platform supports legacy IRQs. Thus, during boot we end up with a
kernel crash like following:
Enabling APIC mode: Flat. Using 1 I/O APICs
BUG: unable to handle kernel NULL pointer dereference at 00000018
IP: [<c107bdc6>] __irq_domain_alloc_irqs+0xff/0x250
The patch fixes the issue by threating legacy property correctly on non-PC
platforms.
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: David Cohen <david.a.cohen@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
arch/x86/kernel/apic/io_apic.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index fe67a5d..14144d8 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -149,6 +149,11 @@ static inline u32 mp_pin_to_gsi(int ioapic, int pin)
return mp_ioapic_gsi_routing(ioapic)->gsi_base + pin;
}
+static inline bool mp_is_legacy_irq(int irq)
+{
+ return irq >= 0 && irq < nr_legacy_irqs();
+}
+
/*
* Initialize all legacy IRQs and all pins on the first IOAPIC
* if we have legacy interrupt controller. Kernel boot option "pirq="
@@ -159,7 +164,7 @@ static inline int mp_init_irq_at_boot(int ioapic, int irq)
if (!nr_legacy_irqs())
return 0;
- return ioapic == 0 || (irq >= 0 && irq < nr_legacy_irqs());
+ return ioapic == 0 || mp_is_legacy_irq(irq);
}
static inline struct irq_domain *mp_ioapic_irqdomain(int ioapic)
@@ -960,7 +965,7 @@ static int alloc_irq_from_domain(struct irq_domain *domain, int ioapic, u32 gsi,
*/
if (!ioapic_initialized || gsi >= nr_legacy_irqs())
irq = gsi;
- legacy = irq >= 0 && irq < nr_legacy_irqs();
+ legacy = mp_is_legacy_irq(irq);
break;
case IOAPIC_DOMAIN_STRICT:
irq = gsi;
@@ -1031,8 +1036,8 @@ static int mp_map_pin_to_irq(u32 gsi, int idx, int ioapic, int pin,
return -ENOSYS;
if (idx >= 0 && test_bit(mp_irqs[idx].srcbus, mp_bus_not_pci)) {
- legacy = true;
irq = mp_irqs[idx].srcbusirq;
+ legacy = mp_is_legacy_irq(irq);
}
mutex_lock(&ioapic_mutex);
--
2.1.3
next reply other threads:[~2014-12-10 18:30 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-10 18:29 Andy Shevchenko [this message]
2014-12-10 22:45 ` [tip:x86/apic] x86, ioapic: Add proper legacy interrupt check to mp_map_pin_to_irq() tip-bot for Andy Shevchenko
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