[PATCH 2/6] drm: bridge/bridge: add support for rk3288 hdmi-audio

[Yakir Yang <ykk@rock-chips.com>]

In rk3288 dw-hdmi, AUD_CTS3 register's BIT(4) is CTS_manual. If "CTS_manual"
set to 0b, AUD_CTS3 contains “audCTS[19:0]” generated by the Cycle time counter
according to specified timing. If “CTS_manual” bit equals 1b, AUD_CTS3 should
be configured with the “audCTS[7:0]” value that should be outputted by the Audio
Packetizer.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---

 drivers/gpu/drm/bridge/dw_hdmi.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/dw_hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c
index 9ba96de..0c19276 100644
--- a/drivers/gpu/drm/bridge/dw_hdmi.c
+++ b/drivers/gpu/drm/bridge/dw_hdmi.c
@@ -191,8 +191,10 @@ static void hdmi_set_clock_regenerator_n(struct dw_hdmi *hdmi,
 
 static void hdmi_regenerate_cts(struct dw_hdmi *hdmi, unsigned int cts)
 {
+	int val = (hdmi->dev_type == RK3288_HDMI) ? 0x10 : 0x00;
+
 	/* Must be set/cleared first */
-	hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
+	hdmi_modb(hdmi, val, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3);
 
 	hdmi_writeb(hdmi, cts & 0xff, HDMI_AUD_CTS1);
 	hdmi_writeb(hdmi, (cts >> 8) & 0xff, HDMI_AUD_CTS2);
-- 
2.1.2