From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754059AbaLVHrQ (ORCPT ); Mon, 22 Dec 2014 02:47:16 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:53606 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1750928AbaLVHrO (ORCPT ); Mon, 22 Dec 2014 02:47:14 -0500 X-Listener-Flag: 11101 Subject: Re: [PATCH v2 0/4] clk: mediatek: Add common clock support for Mediatek MT8135. From: James Liao To: Mike Turquette CC: Rob Herring , Matthias Brugger , Sascha Hauer , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Catalin Marinas , Vladimir Murzin , Ashwin Chaugule , Yingjoe Chen , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , srv_heupstream , Eddie Huang , HenryC Chen In-Reply-To: <1417675942-10502-1-git-send-email-jamesjj.liao@mediatek.com> References: <1417675942-10502-1-git-send-email-jamesjj.liao@mediatek.com> Content-Type: text/plain; charset="us-ascii" Date: Mon, 22 Dec 2014 15:46:59 +0800 Message-ID: <1419234419.24116.7.camel@mtksdaap41> MIME-Version: 1.0 X-Mailer: Evolution 2.28.3 Content-Transfer-Encoding: 7bit X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 2014-12-04 at 14:52 +0800, James Liao wrote: > This patchset contains the initial common clock support for Mediatek SoCs. > Mediatek SoC's clock architecture comprises of various PLLs, dividers, > muxes and clock gates. > > This patchset also contains a basic clock support for Mediatek MT8135. > > This driver is based on 3.18-rc1 + MT8135 basic support. > > James Liao (4): > clk: dts: mediatek: add Mediatek MT8135 clock bindings > clk: mediatek: Add initial common clock support for Mediatek SoCs. > clk: mediatek: Add basic clocks for Mediatek MT8135. > dts: mediatek: Enable clock support for Mediatek MT8135. > Hi, Any comment for this patchset? Best regards, James