From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756043AbbAGXvq (ORCPT ); Wed, 7 Jan 2015 18:51:46 -0500 Received: from mailout2.samsung.com ([203.254.224.25]:14015 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755993AbbAGXv2 (ORCPT ); Wed, 7 Jan 2015 18:51:28 -0500 X-AuditID: cbfee690-f79ab6d0000046f7-e3-54adc6785529 From: Chanwoo Choi To: myungjoo.ham@samsung.com, kgene@kernel.org Cc: kyungmin.park@samsung.com, rafael.j.wysocki@intel.com, mark.rutland@arm.com, a.kesavan@samsung.com, tomasz.figa@gmail.com, k.kozlowski@samsung.com, b.zolnierkie@samsung.com, robh+dt@kernel.org, cw00.choi@samsung.com, inki.dae@samsung.com, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCHv7 07/10] ARM: dts: Add PPMU dt node for Exynos4 SoCs Date: Thu, 08 Jan 2015 08:51:14 +0900 Message-id: <1420674677-3077-8-git-send-email-cw00.choi@samsung.com> X-Mailer: git-send-email 1.8.5.5 In-reply-to: <1420674677-3077-1-git-send-email-cw00.choi@samsung.com> References: <1420674677-3077-1-git-send-email-cw00.choi@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprIIsWRmVeSWpSXmKPExsWyRsSkRLfi2NoQg0/v+C0er1nMZLFxxnpW i+tfnrNaTLo/gcXi9QtDi/7Hr5ktzja9YbfY9Pgaq8XlXXPYLD73HmG0mHF+H5PF0usXmSxu N65gs3i84i27ReveI+wWq3b9YXQQ8Fgzbw2jx85Zd9k9Fu95yeSxaVUnm8fmJfUefVtWMXp8 3iQXwB7FZZOSmpNZllqkb5fAldHybRlzwUTliu49q9gaGPtkuhg5OSQETCTmrL/MCmGLSVy4 t56ti5GLQ0hgKaPEluOzWGCKvsw+wQKRWMQo8eTAJGYIp4lJYuriGewgVWwCWhL7X9xgA7FF BPQkOo/tAYszC/xhkmjaBDZJWMBF4sbmx8wgNouAqsSRrVPAaniB4n3TLzFCbFOQWLZ8JthJ nAKuEks3LwSrFwKqednzixFksYTAS3aJV3N3MkIMEpD4NvkQ0AIOoISsxKYDzBBzJCUOrrjB MoFReAEjwypG0dSC5ILipPQiE73ixNzi0rx0veT83E2MwJg6/e/ZhB2M9w5YH2IU4GBU4uEt 6FsTIsSaWFZcmXuI0RRow0RmKdHkfGDk5pXEGxqbGVmYmpgaG5lbmimJ876W+hksJJCeWJKa nZpakFoUX1Sak1p8iJGJg1OqgTH54oz5vblGPPY5+rF5jg7raoSMazIirssuXSZfw8vLwvaX c332Zd7IU6f1uJa6m/59tX39FKub5R5bLP+0sXqGsR31+OThNFF7XdgOLrvz1zXehwYFJGw9 aXTXaE50j+ps3mdRs91MV/Ndm3RZ+Fm4PoOk73FmSRO15HuuC/beUTG4zGcepcRSnJFoqMVc VJwIAOBda/ukAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrNIsWRmVeSWpSXmKPExsVy+t9jAd2KY2tDDG7dZLV4vGYxk8XGGetZ La5/ec5qMen+BBaL1y8MLfofv2a2ONv0ht1i0+NrrBaXd81hs/jce4TRYsb5fUwWS69fZLK4 3biCzeLxirfsFq17j7BbrNr1h9FBwGPNvDWMHjtn3WX3WLznJZPHplWdbB6bl9R79G1Zxejx eZNcAHtUA6NNRmpiSmqRQmpecn5KZl66rZJ3cLxzvKmZgaGuoaWFuZJCXmJuqq2Si0+Arltm DtDxSgpliTmlQKGAxOJiJX07TBNCQ9x0LWAaI3R9Q4LgeowM0EDCGsaMlm/LmAsmKld071nF 1sDYJ9PFyMkhIWAi8WX2CRYIW0ziwr31bF2MXBxCAosYJZ4cmMQM4TQxSUxdPIMdpIpNQEti /4sbbCC2iICeROexPWBxZoE/TBJNm8AmCQu4SNzY/JgZxGYRUJU4snUKWA0vULxv+iVGiG0K EsuWz2QFsTkFXCWWbl4IVi8EVPOy5xfjBEbeBYwMqxhFUwuSC4qT0nON9IoTc4tL89L1kvNz NzGCI/aZ9A7GVQ0WhxgFOBiVeHgL+taECLEmlhVX5h5ilOBgVhLhXdu2NkSINyWxsiq1KD++ qDQntfgQoynQVROZpUST84HJJK8k3tDYxMzI0sjc0MLI2FxJnFfJvi1ESCA9sSQ1OzW1ILUI po+Jg1OqgXGmcqTP57LrnHdaP1z5M8/EOGzNudzFzlH53/xZZS/JMN+5E/tJ1M3Eqe3TkmOt JmoM+uJ572ZK2ggse+Bw4sIEpoDvZ1IbPf6fCXII/8Dpvc10plnCVLGJ6zQMDhbMf7I20IpB +2bhSo1zdr5CDVxHY7VEJO5s09Jd/1vhV7WQSL3DhXmzJiqxFGckGmoxFxUnAgBvt86j7gIA AA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch add PPMU (Platform Performance Monitoring Unit) dt node for Exynos4 (Exynos4210/4212/4412) SoC. PPMU dt node is used to monitor the utilization of each IP. The Exynos4210/Exynos4212/Exynos4412 SoC includes following PPMUs: - PPMU_DMC0 0x106A_0000 - PPMU_DMC1 0x106B_0000 - PPMU_CPU 0x106C_0000 - PPMU_ACP 0x10AE_0000 - PPMU_RIGHT_BUS 0x112A_0000 - PPMU_LEFT_BUS 0x116A_0000 - PPMU_FSYS 0x1263_0000 - PPMU_LCD0 0x11E4_0000 - PPMU_CAMIF 0x11AC_0000 - PPMU_IMAGE 0x12AA_0000 - PPMU_TV 0x12E4_0000 - PPMU_3D 0x1322_0000 - PPMU_MFC_LEFT 0x1366_0000 - PPMU_MFC_RIGHT 0x1367_0000 Additionally, the Exynos4210 SoC includes following PPMUs: - PPMU_LCD1 0x1224_0000 Cc: Kukjin Kim Signed-off-by: Chanwoo Choi --- arch/arm/boot/dts/exynos4.dtsi | 108 ++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/exynos4210.dtsi | 8 +++ 2 files changed, 116 insertions(+) diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index b8168f1..70064dc 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -645,4 +645,112 @@ samsung,sysreg = <&sys_reg>; status = "disabled"; }; + + ppmu_dmc0: ppmu_dmc0@106a0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x106a0000 0x2000>; + clocks = <&clock CLK_PPMUDMC0>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_dmc1: ppmu_dmc1@106b0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x106b0000 0x2000>; + clocks = <&clock CLK_PPMUDMC1>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_cpu: ppmu_cpu@106c0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x106c0000 0x2000>; + clocks = <&clock CLK_PPMUCPU>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_acp: ppmu_acp@10ae0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x106e0000 0x2000>; + status = "disabled"; + }; + + ppmu_rightbus: ppmu_rightbus@112a0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x112a0000 0x2000>; + clocks = <&clock CLK_PPMURIGHT>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_leftbus: ppmu_leftbus0@116a0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x116a0000 0x2000>; + clocks = <&clock CLK_PPMULEFT>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_camif: ppmu_camif@11ac0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x11ac0000 0x2000>; + clocks = <&clock CLK_PPMUCAMIF>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_lcd0: ppmu_lcd0@11e40000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x11e40000 0x2000>; + clocks = <&clock CLK_PPMULCD0>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_fsys: ppmu_g3d@12630000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x12630000 0x2000>; + status = "disabled"; + }; + + ppmu_image: ppmu_image@12aa0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x12aa0000 0x2000>; + clocks = <&clock CLK_PPMUIMAGE>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_tv: ppmu_tv@12e40000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x12e40000 0x2000>; + clocks = <&clock CLK_PPMUTV>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_g3d: ppmu_g3d@13220000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x13220000 0x2000>; + clocks = <&clock CLK_PPMUG3D>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_mfc_left: ppmu_mfc_left@13660000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x13660000 0x2000>; + clocks = <&clock CLK_PPMUMFC_L>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_mfc_right: ppmu_mfc_right@13670000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x13670000 0x2000>; + clocks = <&clock CLK_PPMUMFC_R>; + clock-names = "ppmu"; + status = "disabled"; + }; }; diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index bcc9e63..b2598de 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -192,4 +192,12 @@ samsung,lcd-wb; }; }; + + ppmu_lcd1: ppmu_lcd1@12240000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x12240000 0x2000>; + clocks = <&clock CLK_PPMULCD1>; + clock-names = "ppmu"; + status = "disabled"; + }; }; -- 1.8.5.5