From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Moudy Ho <moudy.ho@mediatek.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Chun-Kuang Hu <chunkuang.hu@kernel.org>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
Project_Global_Chrome_Upstream_Group@mediatek.com
Subject: Re: [PATCH v3 4/8] arm64: dts: mediatek: mt8195: add MUTEX configuration for VPPSYS
Date: Thu, 13 Oct 2022 10:17:58 +0200 [thread overview]
Message-ID: <14228ff6-f2de-6d85-d0ee-41983941659a@collabora.com> (raw)
In-Reply-To: <20221013020329.8800-5-moudy.ho@mediatek.com>
Il 13/10/22 04:03, Moudy Ho ha scritto:
> In MT8195, the MMSYS has two Video Processor Pipepline Subsystems
> named VPPSYS0 and VPPSYS1, each with specific MUTEX to control
> Start of Frame(SOF) and End of Frame (EOF) signals.
> Before working with them, the addresses, interrupts, clocks and power
> domains need to be set up in dts.
>
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
next prev parent reply other threads:[~2022-10-13 8:18 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-13 2:03 [PATCH v3 0/8] add support for MT8195 VPPSYS on MMSYS and MUTEX Moudy Ho
2022-10-13 2:03 ` [PATCH v3 1/8] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS Moudy Ho
2022-10-13 2:03 ` [PATCH v3 4/8] arm64: dts: mediatek: mt8195: add MUTEX configuration for VPPSYS Moudy Ho
2022-10-13 8:17 ` AngeloGioacchino Del Regno [this message]
[not found] ` <20221013020329.8800-6-moudy.ho@mediatek.com>
2022-10-13 8:19 ` [PATCH v3 5/8] soc: mediatek: mmsys: add support for MT8195 VPPSYS AngeloGioacchino Del Regno
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