From: Yannick Guerrini <yguerrini@tomshardware.fr>
To: tglx@linutronix.de
Cc: mingo@redhat.com, hpa@zytor.com, trivial@kernel.org,
linux-kernel@vger.kernel.org,
Yannick Guerrini <yguerrini@tomshardware.fr>
Subject: [PATCH] x86, cpu: Fix trivial typo in intel_tlb_table
Date: Sat, 21 Feb 2015 23:41:50 +0100 [thread overview]
Message-ID: <1424558510-1420-1-git-send-email-yguerrini@tomshardware.fr> (raw)
Change 'ssociative' to 'associative'
Signed-off-by: Yannick Guerrini <yguerrini@tomshardware.fr>
---
arch/x86/kernel/cpu/intel.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 94d7dcb..50163fa 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -565,8 +565,8 @@ static const struct _tlb_table intel_tlb_table[] = {
{ 0xb2, TLB_INST_4K, 64, " TLB_INST 4KByte pages, 4-way set associative" },
{ 0xb3, TLB_DATA_4K, 128, " TLB_DATA 4 KByte pages, 4-way set associative" },
{ 0xb4, TLB_DATA_4K, 256, " TLB_DATA 4 KByte pages, 4-way associative" },
- { 0xb5, TLB_INST_4K, 64, " TLB_INST 4 KByte pages, 8-way set ssociative" },
- { 0xb6, TLB_INST_4K, 128, " TLB_INST 4 KByte pages, 8-way set ssociative" },
+ { 0xb5, TLB_INST_4K, 64, " TLB_INST 4 KByte pages, 8-way set associative" },
+ { 0xb6, TLB_INST_4K, 128, " TLB_INST 4 KByte pages, 8-way set associative" },
{ 0xba, TLB_DATA_4K, 64, " TLB_DATA 4 KByte pages, 4-way associative" },
{ 0xc0, TLB_DATA_4K_4M, 8, " TLB_DATA 4 KByte and 4 MByte pages, 4-way associative" },
{ 0xc1, STLB_4K_2M, 1024, " STLB 4 KByte and 2 MByte pages, 8-way associative" },
--
1.9.5.msysgit.0
next reply other threads:[~2015-02-21 22:42 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-21 22:41 Yannick Guerrini [this message]
2015-02-22 8:00 ` [tip:x86/urgent] x86/cpu/intel: Fix trivial typo in intel_tlb_table[] tip-bot for Yannick Guerrini
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