From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755511AbbCBQ57 (ORCPT ); Mon, 2 Mar 2015 11:57:59 -0500 Received: from mail-wg0-f54.google.com ([74.125.82.54]:43015 "EHLO mail-wg0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754182AbbCBQ55 (ORCPT ); Mon, 2 Mar 2015 11:57:57 -0500 From: Baptiste Reynal To: iommu@lists.linux-foundation.org, kvmarm@lists.cs.columbia.edu Cc: tech@virtualopensystems.com, Baptiste Reynal , Will Deacon , Joerg Roedel , linux-arm-kernel@lists.infradead.org (moderated list:ARM SMMU DRIVER), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 1/1] iommu/arm-smmu: fix ARM_SMMU_FEAT_TRANS_OPS condition Date: Mon, 2 Mar 2015 17:57:22 +0100 Message-Id: <1425315442-29584-1-git-send-email-b.reynal@virtualopensystems.com> X-Mailer: git-send-email 2.3.1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch is a fix to "iommu/arm-smmu: add support for iova_to_phys through ATS1PR". According to ARM documentation, translation registers are optional even in SMMUv1, so ID0_S1TS needs to be checked to verify their presence. Signed-off-by: Baptiste Reynal --- drivers/iommu/arm-smmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index fc13dd5..d4beca4 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1556,7 +1556,7 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) return -ENODEV; } - if (smmu->version == 1 || (!(id & ID0_ATOSNS) && (id & ID0_S1TS))) { + if ((id & ID0_S1TS) && ((smmu->version == 1) || (id & ID0_ATOSNS))) { smmu->features |= ARM_SMMU_FEAT_TRANS_OPS; dev_notice(smmu->dev, "\taddress translation ops\n"); } -- 2.3.1