From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755042AbbCFEO4 (ORCPT ); Thu, 5 Mar 2015 23:14:56 -0500 Received: from szxga03-in.huawei.com ([119.145.14.66]:50288 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754976AbbCFEOw (ORCPT ); Thu, 5 Mar 2015 23:14:52 -0500 From: Yun Wu To: , , CC: , , Yun Wu Subject: [PATCH v4 1/5] irqchip: gicv3-its: zero itt before handling to hardware Date: Fri, 6 Mar 2015 12:13:19 +0800 Message-ID: <1425615203-3300-2-git-send-email-wuyun.wu@huawei.com> X-Mailer: git-send-email 1.9.4.msysgit.1 In-Reply-To: <1425615203-3300-1-git-send-email-wuyun.wu@huawei.com> References: <1425615203-3300-1-git-send-email-wuyun.wu@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.177.24.136] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020202.54F92978.0121,ss=1,re=0.001,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 48134d77865f4f5492e187995a233399 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some kind of brain-dead implementations chooses to insert ITEes in rapid sequence of disabled ITEes, and an un-zeroed ITT will confuse ITS on judging whether an ITE is really enabled or not. Considering the implementations are still supported by the GICv3 architecture, in which ITT is not required to be zeroed before being handled to hardware, we do the favor in ITS driver. Acked-by: Marc Zyngier Signed-off-by: Yun Wu --- drivers/irqchip/irq-gic-v3-its.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 6850141..69eeea3 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -1076,7 +1076,7 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id, nr_ites = max(2UL, roundup_pow_of_two(nvecs)); sz = nr_ites * its->ite_size; sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; - itt = kmalloc(sz, GFP_KERNEL); + itt = kzalloc(sz, GFP_KERNEL); lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis); if (!dev || !itt || !lpi_map) { -- 1.8.0