From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752260AbbCKST2 (ORCPT ); Wed, 11 Mar 2015 14:19:28 -0400 Received: from mga09.intel.com ([134.134.136.24]:23987 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751670AbbCKST0 (ORCPT ); Wed, 11 Mar 2015 14:19:26 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.11,383,1422950400"; d="scan'208";a="465889869" From: Ross Zwisler To: linux-kernel@vger.kernel.org Cc: Ross Zwisler , H Peter Anvin , Ingo Molnar , Thomas Gleixner , Borislav Petkov Subject: [PATCH] x86: Add kerneldoc for pcommit_sfence() Date: Wed, 11 Mar 2015 12:19:21 -0600 Message-Id: <1426097961-24921-1-git-send-email-ross.zwisler@linux.intel.com> X-Mailer: git-send-email 1.9.3 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add kerneldoc comments for pcommit_sfence() describing the purpose of the pcommit instruction and demonstrating the usage of that instruction. Signed-off-by: Ross Zwisler Cc: H Peter Anvin Cc: Ingo Molnar Cc: Thomas Gleixner Cc: Borislav Petkov --- arch/x86/include/asm/special_insns.h | 37 ++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h index aeb4666e0c0a..1ae81757c05b 100644 --- a/arch/x86/include/asm/special_insns.h +++ b/arch/x86/include/asm/special_insns.h @@ -215,6 +215,43 @@ static inline void clwb(volatile void *__p) : [pax] "a" (p)); } +/** + * pcommit_sfence() - persistent commit and fence + * + * The pcommit instruction ensures that data that has been flushed from the + * processor's cache hierarchy with clwb, clflushopt or clflush is accepted to + * memory and is durable on the DIMM. The primary use case for this is + * persistent memory. + * + * This function shows how to properly use clwb/clflushopt/clflush and pcommit + * with appropriate fencing: + * + * void flush_and_commit_buffer(void *vaddr, unsigned int size) + * { + * unsigned long clflush_mask = boot_cpu_data.x86_clflush_size - 1; + * char *vend = (char *)vaddr + size; + * char *p; + * + * for (p = (char *)((unsigned long)vaddr & ~clflush_mask); + * p < vend; p += boot_cpu_data.x86_clflush_size) + * clwb(p); + * + * // sfence to order clwb/clflushopt/clflush cache flushes + * // mfence via mb() also works + * wmb(); + * + * // pcommit and the required sfence for ordering + * pcommit_sfence(); + * } + * + * After this function completes the data pointed to by vaddr is has been + * accepted to memory and will be durable if the vaddr points to persistent + * memory. + * + * Pcommit must always be ordered by an mfence or sfence, so to help simplify + * things we include both the pcommit and the required sfence in the + * alternatives generated by pcommit_sfence(). + */ static inline void pcommit_sfence(void) { alternative(ASM_NOP7, -- 1.9.3