From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932208AbbCLNh5 (ORCPT ); Thu, 12 Mar 2015 09:37:57 -0400 Received: from mailout4.w1.samsung.com ([210.118.77.14]:24680 "EHLO mailout4.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754824AbbCLNhq (ORCPT ); Thu, 12 Mar 2015 09:37:46 -0400 X-AuditID: cbfec7f4-b7f126d000001e9a-b4-5501961672c3 From: Andrzej Hajda To: Kukjin Kim Cc: Andrzej Hajda , Marek Szyprowski , Kyungmin Park , javier.martinez@collabora.co.uk, Liquid.Acid@gmx.net, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 RESEND 2/4] arm/exynos/pm_domains: add support for async-bridge clocks Date: Thu, 12 Mar 2015 14:37:09 +0100 Message-id: <1426167431-24470-3-git-send-email-a.hajda@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1426167431-24470-1-git-send-email-a.hajda@samsung.com> References: <1426167431-24470-1-git-send-email-a.hajda@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprELMWRmVeSWpSXmKPExsVy+t/xK7pi0xhDDaYc0bO4te4cq8X8I0Di ytf3bBZHfxdY9D9+zWxxtukNu8Wmx9dYLS7vmsNmMeP8PiaLrp8/2SzWHrnL7sDt8ff5dRaP xZv2s3lsWtXJ5nG/+ziTx+Yl9R59W1YxenzeJBfAHsVlk5Kak1mWWqRvl8CVcfHqH6aCNtGK 952LWRsYGwW7GDk5JARMJL4fu8IEYYtJXLi3nq2LkYtDSGApo8SR9+vZIZw+JonjC1vBqtgE NCX+br4JVMXBISKgKLF5gQJIDbPAYyaJuxNXs4DUCAtES6ycsY0ZxGYRUJVYduk9mM0r4Czx 79E/qG1yEiePTWYFsTkFXCSuP//EBmILAdVc7T3BOoGRdwEjwypG0dTS5ILipPRcQ73ixNzi 0rx0veT83E2MkHD8soNx8TGrQ4wCHIxKPLwRfQyhQqyJZcWVuYcYJTiYlUR4S9sZQ4V4UxIr q1KL8uOLSnNSiw8xMnFwSjUwdl2LcsvN5ldyT9gYJne9u+aawVuF65NW3SzUddj69NP+zHSm 0+oBTvVZ01/e4GauunPIY68i19bI29/vx19uf3myt269oOC2NsGLr/erTXrVv0PgZpiJjuxF y6MrNnznj9Tbxs03Wf21R0jE180mmQ3vTaUvbr68UVT15RzR7UdPb3l/81l4qxJLcUaioRZz UXEiADY6Zd8lAgAA Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Since Exynos5420 there are async-bridges (ASB) between different IPs. These bridges must be operational during power domain on/off, ie. clocks used by these bridges should be enabled. This patch enabled these clocks during domain on/off. Signed-off-by: Andrzej Hajda Reviewed-by: Javier Martinez Canillas Tested-by: Javier Martinez Canillas Reviewed-by: Sylwester Nawrocki --- arch/arm/mach-exynos/pm_domains.c | 27 +++++++++++++++++++++++---- 1 file changed, 23 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c index 37266a8..507dad0 100644 --- a/arch/arm/mach-exynos/pm_domains.c +++ b/arch/arm/mach-exynos/pm_domains.c @@ -37,6 +37,7 @@ struct exynos_pm_domain { struct clk *oscclk; struct clk *clk[MAX_CLK_PER_DOMAIN]; struct clk *pclk[MAX_CLK_PER_DOMAIN]; + struct clk *asb_clk[MAX_CLK_PER_DOMAIN]; }; static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) @@ -45,14 +46,19 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) void __iomem *base; u32 timeout, pwr; char *op; + int i; pd = container_of(domain, struct exynos_pm_domain, pd); base = pd->base; + for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { + if (IS_ERR(pd->asb_clk[i])) + break; + clk_prepare_enable(pd->asb_clk[i]); + } + /* Set oscclk before powering off a domain*/ if (!power_on) { - int i; - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { if (IS_ERR(pd->clk[i])) break; @@ -81,8 +87,6 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) /* Restore clocks after powering on a domain*/ if (power_on) { - int i; - for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { if (IS_ERR(pd->clk[i])) break; @@ -92,6 +96,12 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) } } + for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { + if (IS_ERR(pd->asb_clk[i])) + break; + clk_disable_unprepare(pd->asb_clk[i]); + } + return 0; } @@ -131,6 +141,15 @@ static __init int exynos4_pm_init_power_domain(void) pd->pd.power_off = exynos_pd_power_off; pd->pd.power_on = exynos_pd_power_on; + for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { + char clk_name[8]; + + snprintf(clk_name, sizeof(clk_name), "asb%d", i); + pd->asb_clk[i] = clk_get(dev, clk_name); + if (IS_ERR(pd->asb_clk[i])) + break; + } + pd->oscclk = clk_get(dev, "oscclk"); if (IS_ERR(pd->oscclk)) goto no_clk; -- 1.9.1