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From: Daniel Thompson <daniel.thompson@linaro.org>
To: linux-arm-kernel@lists.infradead.org
Cc: Daniel Thompson <daniel.thompson@linaro.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	linux-kernel@vger.kernel.org, patches@linaro.org,
	linaro-kernel@lists.linaro.org,
	John Stultz <john.stultz@linaro.org>,
	Sumit Semwal <sumit.semwal@linaro.org>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Andrew Thoelke <andrew.thoelke@arm.com>
Subject: [RFC PATCH 4/7] arm64: irqflags: Reorder the fiq & async macros
Date: Wed, 18 Mar 2015 14:20:25 +0000	[thread overview]
Message-ID: <1426688428-3150-5-git-send-email-daniel.thompson@linaro.org> (raw)
In-Reply-To: <1426688428-3150-1-git-send-email-daniel.thompson@linaro.org>

Separate out the local fiq & async macros from the various arch inlines.
This makes is easier for us (in a later patch) to provide an alternative
implementation of these inlines.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
---
 arch/arm64/include/asm/irqflags.h | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/include/asm/irqflags.h b/arch/arm64/include/asm/irqflags.h
index 11cc941bd107..df7477af6389 100644
--- a/arch/arm64/include/asm/irqflags.h
+++ b/arch/arm64/include/asm/irqflags.h
@@ -53,12 +53,6 @@ static inline void arch_local_irq_disable(void)
 		: "memory");
 }
 
-#define local_fiq_enable()	asm("msr	daifclr, #1" : : : "memory")
-#define local_fiq_disable()	asm("msr	daifset, #1" : : : "memory")
-
-#define local_async_enable()	asm("msr	daifclr, #4" : : : "memory")
-#define local_async_disable()	asm("msr	daifset, #4" : : : "memory")
-
 /*
  * Save the current interrupt enable state.
  */
@@ -90,6 +84,12 @@ static inline int arch_irqs_disabled_flags(unsigned long flags)
 	return flags & PSR_I_BIT;
 }
 
+#define local_fiq_enable()	asm("msr	daifclr, #1" : : : "memory")
+#define local_fiq_disable()	asm("msr	daifset, #1" : : : "memory")
+
+#define local_async_enable()	asm("msr	daifclr, #4" : : : "memory")
+#define local_async_disable()	asm("msr	daifset, #4" : : : "memory")
+
 /*
  * save and restore debug state
  */
-- 
2.1.0


  parent reply	other threads:[~2015-03-18 14:21 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-18 14:20 [RFC PATCH 0/7] Pseudo-NMI for arm64 using ICC_PMR_EL1 (GICv3) Daniel Thompson
2015-03-18 14:20 ` [RFC PATCH 1/7] serial: Emulate break using control characters Daniel Thompson
2015-03-19 22:05   ` Peter Hurley
2015-03-23 15:14     ` Daniel Thompson
2015-03-20 14:28   ` Dave Martin
2015-03-23 15:28     ` Daniel Thompson
2015-03-23 16:28       ` Dave Martin
2015-03-23 19:05         ` One Thousand Gnomes
2015-03-18 14:20 ` [RFC PATCH 2/7] printk: Simple implementation for NMI backtracing Daniel Thompson
2015-03-19 17:39   ` Steven Rostedt
2015-03-19 18:30     ` Peter Zijlstra
2015-03-19 18:48       ` Daniel Thompson
2015-03-19 19:01         ` Steven Rostedt
2015-03-23 14:51           ` Daniel Thompson
2015-03-18 14:20 ` [RFC PATCH 3/7] irqchip: gic-v3: Reset BPR during initialization Daniel Thompson
2015-03-18 14:20 ` Daniel Thompson [this message]
2015-03-18 14:20 ` [RFC PATCH 5/7] arm64: irqflags: Use ICC sysregs to implement IRQ masking Daniel Thompson
2015-03-18 14:20 ` [RFC PATCH 6/7] arm64: irqflags: Automatically identify I bit mis-management Daniel Thompson
2015-03-18 14:20 ` [RFC PATCH 7/7] arm64: Add support for on-demand backtrace of other CPUs Daniel Thompson
2015-03-20 15:45 ` [RFC PATCH 0/7] Pseudo-NMI for arm64 using ICC_PMR_EL1 (GICv3) Dave Martin
2015-03-23 18:47   ` Daniel Thompson
2015-04-01 15:15     ` Dave Martin
2015-04-01 15:29       ` Marc Zyngier
2015-04-08 12:27         ` Daniel Thompson

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