From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751889AbbCTWYN (ORCPT ); Fri, 20 Mar 2015 18:24:13 -0400 Received: from mail-by2on0141.outbound.protection.outlook.com ([207.46.100.141]:16359 "EHLO na01-by2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751707AbbCTWXx (ORCPT ); Fri, 20 Mar 2015 18:23:53 -0400 X-WSS-ID: 0NLJ7JM-08-JI6-02 X-M-MSG: From: Aravind Gopalakrishnan To: , , , , , , , , , CC: Aravind Gopalakrishnan Subject: [PATCH V2 2/2] x86, mce, severities: Define mce_severity function pointer Date: Fri, 20 Mar 2015 11:31:08 -0500 Message-ID: <1426869068-4155-3-git-send-email-Aravind.Gopalakrishnan@amd.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1426869068-4155-1-git-send-email-Aravind.Gopalakrishnan@amd.com> References: <1426869068-4155-1-git-send-email-Aravind.Gopalakrishnan@amd.com> MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 Authentication-Results: spf=none (sender IP is 165.204.84.222) smtp.mailfrom=Aravind.Gopalakrishnan@amd.com; alien8.de; dkim=none (message not signed) header.d=none; X-Forefront-Antispam-Report: CIP:165.204.84.222;CTRY:US;IPV:NLI;EFV:NLI;BMV:1;SFV:NSPM;SFS:(10019020)(6009001)(428002)(199003)(189002)(92566002)(87936001)(48376002)(101416001)(2950100001)(77096005)(46102003)(50466002)(36756003)(50986999)(47776003)(53416004)(50226001)(2201001)(86362001)(76176999)(105586002)(106466001)(62966003)(77156002)(19580395003)(229853001)(19580405001)(575784001)(921003)(1121003);DIR:OUT;SFP:1102;SCL:1;SRVR:BY1PR0201MB0886;H:atltwp02.amd.com;FPR:;SPF:None;MLV:sfv;A:1;MX:1;LANG:en; X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BY1PR0201MB0886;UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BY1PR0201MB1062; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(5002010)(5005006);SRVR:BY1PR0201MB0886;BCL:0;PCL:0;RULEID:;SRVR:BY1PR0201MB0886; X-Forefront-PRVS: 05214FD68E X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Mar 2015 22:23:48.2665 (UTC) X-MS-Exchange-CrossTenant-Id: fde4dada-be84-483f-92cc-e026cbee8e96 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=fde4dada-be84-483f-92cc-e026cbee8e96;Ip=[165.204.84.222];Helo=[atltwp02.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY1PR0201MB0886 X-OriginatorOrg: amd4.onmicrosoft.com Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Rename mce_severity() as mce_severity_intel and assign mce_severity function pointer to either one of mce_severity_intel or mce_severity_amd during init depending on which processor we are on. This way, we can avoid a test to call mce_severity_amd every time we get into mce_severity(). And it's cleaner to do it this way. Suggested-by: Tony Luck Signed-off-by: Aravind Gopalakrishnan --- arch/x86/include/asm/mce.h | 2 ++ arch/x86/kernel/cpu/mcheck/mce-internal.h | 3 ++- arch/x86/kernel/cpu/mcheck/mce-severity.c | 35 ++++++++++++++++++++++++++----- arch/x86/kernel/cpu/mcheck/mce.c | 1 + 4 files changed, 35 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h index b574fbf..1f5a86d 100644 --- a/arch/x86/include/asm/mce.h +++ b/arch/x86/include/asm/mce.h @@ -134,9 +134,11 @@ extern int mce_p5_enabled; #ifdef CONFIG_X86_MCE int mcheck_init(void); void mcheck_cpu_init(struct cpuinfo_x86 *c); +void mcheck_vendor_init_severity(void); #else static inline int mcheck_init(void) { return 0; } static inline void mcheck_cpu_init(struct cpuinfo_x86 *c) {} +static inline void mcheck_vendor_init_severity(void) {} #endif #ifdef CONFIG_X86_ANCIENT_MCE diff --git a/arch/x86/kernel/cpu/mcheck/mce-internal.h b/arch/x86/kernel/cpu/mcheck/mce-internal.h index e12f0bf..4758f5f 100644 --- a/arch/x86/kernel/cpu/mcheck/mce-internal.h +++ b/arch/x86/kernel/cpu/mcheck/mce-internal.h @@ -24,7 +24,8 @@ struct mce_bank { char attrname[ATTR_LEN]; /* attribute name */ }; -int mce_severity(struct mce *a, int tolerant, char **msg, bool is_excp); +extern int (*mce_severity)(struct mce *a, int tolerant, + char **msg, bool is_excp); struct dentry *mce_get_debugfs_dir(void); extern struct mce_bank *mce_banks; diff --git a/arch/x86/kernel/cpu/mcheck/mce-severity.c b/arch/x86/kernel/cpu/mcheck/mce-severity.c index 4f8f87d..683a06f 100644 --- a/arch/x86/kernel/cpu/mcheck/mce-severity.c +++ b/arch/x86/kernel/cpu/mcheck/mce-severity.c @@ -187,7 +187,8 @@ static int error_context(struct mce *m) } /* keeping mce_severity_amd in sync with AMD error scope heirarchy table */ -static int mce_severity_amd(struct mce *m, enum context ctx) +static int mce_severity_amd(struct mce *m, int tolerant, + char **msg, bool is_excp) { enum context ctx = error_context(m); /* Processor Context Corrupt, no need to fumble too much, die! */ @@ -236,15 +237,13 @@ static int mce_severity_amd(struct mce *m, enum context ctx) return MCE_KEEP_SEVERITY; } -int mce_severity(struct mce *m, int tolerant, char **msg, bool is_excp) +static int mce_severity_intel(struct mce *m, int tolerant, + char **msg, bool is_excp) { enum exception excp = (is_excp ? EXCP_CONTEXT : NO_EXCP); enum context ctx = error_context(m); struct severity *s; - if (m->cpuvendor == X86_VENDOR_AMD) - return mce_severity_amd(m, ctx); - for (s = severities;; s++) { if ((m->status & s->mask) != s->result) continue; @@ -269,6 +268,32 @@ int mce_severity(struct mce *m, int tolerant, char **msg, bool is_excp) } } +static int mce_severity_default(struct mce *m, int tolerant, + char **msg, bool is_excp) +{ + return MCE_PANIC_SEVERITY; +} + +int (*mce_severity)(struct mce *m, int tolerant, char **msg, bool is_excp) = + mce_severity_default; + +void __init mcheck_vendor_init_severity(void) +{ + struct cpuinfo_x86 *c = &boot_cpu_data; + + switch (c->x86_vendor) { + case X86_VENDOR_INTEL: + mce_severity = mce_severity_intel; + break; + case X86_VENDOR_AMD: + mce_severity = mce_severity_amd; + break; + default: + WARN_ONCE(1, "WTF!?"); + break; + } +} + #ifdef CONFIG_DEBUG_FS static void *s_start(struct seq_file *f, loff_t *pos) { diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index 680cfb2..f22e76f 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c @@ -2030,6 +2030,7 @@ __setup("mce", mcheck_enable); int __init mcheck_init(void) { mcheck_intel_therm_init(); + mcheck_vendor_init_severity(); return 0; } -- 1.9.1