From: Chen-Yu Tsai <wens@csie.org>
To: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com,
Hans de Goede <hdegoede@redhat.com>,
Marcus Cooper <codekipper@gmail.com>
Subject: [PATCH 3/3] ARM: dts: sun6i: Add cpu thermal zones to dtsi
Date: Thu, 26 Mar 2015 05:04:49 +0800 [thread overview]
Message-ID: <1427317489-708-4-git-send-email-wens@csie.org> (raw)
In-Reply-To: <1427317489-708-1-git-send-email-wens@csie.org>
The core temperature sensor now supports thermal zones. Add a thermal
zone mapping for the cpus with passive cooling (cpufreq throttling).
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/boot/dts/sun6i-a31.dtsi | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 9a68acc1070f..60d912eeb7c7 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -50,6 +50,7 @@
#include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/thermal/thermal.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
@@ -133,6 +134,38 @@
};
};
+ thermal-zones {
+ cpu_thermal {
+ /* milliseconds */
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&rtp>;
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert0>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+
+ trips {
+ cpu_alert0: cpu_alert0 {
+ /* milliCelsius */
+ temperature = <70000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_crit: cpu_crit {
+ /* milliCelsius */
+ temperature = <100000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+ };
+
memory {
reg = <0x40000000 0x80000000>;
};
--
2.1.4
next prev parent reply other threads:[~2015-03-25 21:05 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-25 21:04 [PATCH 0/3] ARM: dts: sun6i: Enable cpufreq support for A31/A31s Chen-Yu Tsai
2015-03-25 21:04 ` [PATCH 1/3] ARM: dts: sun6i: Set PLL6 as parent to AHB1 clock in AHB1 clock node Chen-Yu Tsai
2015-03-25 21:04 ` [PATCH 2/3] ARM: dts: sun6i: Add cpu clock reference and operating points to dtsi Chen-Yu Tsai
2015-03-25 21:04 ` Chen-Yu Tsai [this message]
2015-03-25 22:07 ` [PATCH 0/3] ARM: dts: sun6i: Enable cpufreq support for A31/A31s Maxime Ripard
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