From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753155AbbC0OV4 (ORCPT ); Fri, 27 Mar 2015 10:21:56 -0400 Received: from bhuna.collabora.co.uk ([93.93.135.160]:39381 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753017AbbC0OVx (ORCPT ); Fri, 27 Mar 2015 10:21:53 -0400 From: Javier Martinez Canillas To: Kukjin Kim Cc: Doug Anderson , Olof Johansson , Krzysztof Kozlowski , Abhilash Kesavan , Kevin Hilman , Tyler Baker , Steve Capper , Amit Kucheria , linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Javier Martinez Canillas Subject: [RFC PATCH 1/2] clk: exynos5420: Add alias for MDMA0 controller clock Date: Fri, 27 Mar 2015 15:21:36 +0100 Message-Id: <1427466097-7287-2-git-send-email-javier.martinez@collabora.co.uk> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1427466097-7287-1-git-send-email-javier.martinez@collabora.co.uk> References: <1427466097-7287-1-git-send-email-javier.martinez@collabora.co.uk> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The MDMA0 controller clock needs to be enabled to allow the system to be resumed when entering into a suspend state. The clock is disabled as a part of the runtime pm for the pl330 DMA driver so the system fails to resume. So to allow the system to grab the clock and make sure that it stays enabled during suspend, an alias has to be added so a clock lookup for a clock is registered. Signed-off-by: Javier Martinez Canillas --- drivers/clk/samsung/clk-exynos5420.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 07d666cc6a29..8b49e8b3b548 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -893,7 +893,7 @@ static struct samsung_div_clock exynos5x_div_clks[] __initdata = { static struct samsung_gate_clock exynos5x_gate_clks[] __initdata = { /* G2D */ - GATE(CLK_MDMA0, "mdma0", "aclk266_g2d", GATE_IP_G2D, 1, 0, 0), + GATE_A(CLK_MDMA0, "mdma0", "aclk266_g2d", GATE_IP_G2D, 1, 0, 0, "mdma0"), GATE(CLK_SSS, "sss", "aclk266_g2d", GATE_IP_G2D, 2, 0, 0), GATE(CLK_G2D, "g2d", "aclk333_g2d", GATE_IP_G2D, 3, 0, 0), GATE(CLK_SMMU_MDMA0, "smmu_mdma0", "aclk266_g2d", GATE_IP_G2D, 5, 0, 0), -- 2.1.4