From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030251AbbC0PBl (ORCPT ); Fri, 27 Mar 2015 11:01:41 -0400 Received: from e23smtp04.au.ibm.com ([202.81.31.146]:40025 "EHLO e23smtp04.au.ibm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753435AbbC0O5A (ORCPT ); Fri, 27 Mar 2015 10:57:00 -0400 From: Alexey Kardashevskiy To: linuxppc-dev@lists.ozlabs.org Cc: Alexey Kardashevskiy , Benjamin Herrenschmidt , Paul Mackerras , Alex Williamson , linux-kernel@vger.kernel.org Subject: [PATCH kernel v7 23/31] powerpc/powernv: Change prototypes to receive iommu Date: Sat, 28 Mar 2015 01:55:07 +1100 Message-Id: <1427468115-2224-24-git-send-email-aik@ozlabs.ru> X-Mailer: git-send-email 2.0.0 In-Reply-To: <1427468115-2224-1-git-send-email-aik@ozlabs.ru> References: <1427468115-2224-1-git-send-email-aik@ozlabs.ru> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15032714-0013-0000-0000-000001021083 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This changes few functions to receive a iommu_table_group pointer rather than PE as they are going to be a part of upcoming iommu_table_group_ops callback set. Signed-off-by: Alexey Kardashevskiy --- arch/powerpc/platforms/powernv/pci-ioda.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c index 74e119c..80ea84d 100644 --- a/arch/powerpc/platforms/powernv/pci-ioda.c +++ b/arch/powerpc/platforms/powernv/pci-ioda.c @@ -1408,10 +1408,12 @@ static __be64 *pnv_alloc_tce_table(int nid, return addr; } -static long pnv_pci_ioda2_create_table(struct pnv_ioda_pe *pe, +static long pnv_pci_ioda2_create_table(struct iommu_table_group *table_group, __u32 page_shift, __u64 window_size, __u32 levels, struct iommu_table *tbl) { + struct pnv_ioda_pe *pe = container_of(table_group, struct pnv_ioda_pe, + table_group); int nid = pe->phb->hose->node; void *addr; unsigned long tce_table_size, left; @@ -1462,9 +1464,11 @@ static void pnv_pci_free_table(struct iommu_table *tbl) iommu_reset_table(tbl, "ioda2"); } -static long pnv_pci_ioda2_set_window(struct pnv_ioda_pe *pe, +static long pnv_pci_ioda2_set_window(struct iommu_table_group *table_group, struct iommu_table *tbl) { + struct pnv_ioda_pe *pe = container_of(table_group, struct pnv_ioda_pe, + table_group); struct pnv_phb *phb = pe->phb; const __be64 *swinvp; int64_t rc; @@ -1599,12 +1603,11 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb, /* The PE will reserve all possible 32-bits space */ pe->tce32_seg = 0; - end = (1 << ilog2(phb->ioda.m32_pci_base)); pe_info(pe, "Setting up 32-bit TCE table at 0..%08x\n", end); - rc = pnv_pci_ioda2_create_table(pe, IOMMU_PAGE_SHIFT_4K, + rc = pnv_pci_ioda2_create_table(&pe->table_group, IOMMU_PAGE_SHIFT_4K, phb->ioda.m32_pci_base, POWERNV_IOMMU_DEFAULT_LEVELS, tbl); if (rc) { @@ -1619,7 +1622,7 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb, pe->table_group.ops = &pnv_pci_ioda2_ops; #endif - rc = pnv_pci_ioda2_set_window(pe, tbl); + rc = pnv_pci_ioda2_set_window(&pe->table_group, tbl); if (rc) { pe_err(pe, "Failed to configure 32-bit TCE table," " err %ld\n", rc); -- 2.0.0