From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751337AbbDLMsw (ORCPT ); Sun, 12 Apr 2015 08:48:52 -0400 Received: from mout.gmx.net ([212.227.15.19]:57713 "EHLO mout.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750846AbbDLMsu (ORCPT ); Sun, 12 Apr 2015 08:48:50 -0400 From: Sergej Sawazki To: mturquette@linaro.org, sboyd@codeaurora.org, sebastian.hesselbarth@gmail.com Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Sergej Sawazki Subject: [PATCH] clk: si5351: fix .recalc_rate for multisynth 6-7 Date: Sun, 12 Apr 2015 14:48:26 +0200 Message-Id: <1428842906-24808-1-git-send-email-ce3a@gmx.de> X-Mailer: git-send-email 1.9.1 X-Provags-ID: V03:K0:PbcMEW/fdKpHJIDSDcYyzqvCjO3Yl4g2qP/9BnE3cPpnhb7M+Hj raAMVBiC0nEO8UijrH40Ec8R67xQtywwe+UzSk2SILvTxwcTe0CfYmwn1+Jshy5eMNYBpFt JY3qS1N/Dym6KGNTZwWY2+911Gu06bji2UOBwIZI4PnQ0N0LvLDC3Xau5DZqcwJJlh6MvrR kIeKvfoWOnuoSTdZBeLXw== X-UI-Out-Filterresults: notjunk:1; Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org MS6 and MS7 do not have the MSx_P3 field. Do the 'params.p3 == 0' check for MS0-M5 only. See [AN619, p. 6] for details. Referenced document: [AN619] Manually Generating an Si5351 Register Map, Rev. 0.4 Signed-off-by: Sergej Sawazki --- drivers/clk/clk-si5351.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c index 8e90bdd..e7db92f 100644 --- a/drivers/clk/clk-si5351.c +++ b/drivers/clk/clk-si5351.c @@ -607,9 +607,6 @@ static unsigned long si5351_msynth_recalc_rate(struct clk_hw *hw, if (!hwdata->params.valid) si5351_read_parameters(hwdata->drvdata, reg, &hwdata->params); - if (hwdata->params.p3 == 0) - return parent_rate; - /* * multisync0-5: fOUT = (128 * P3 * fIN) / (P1*P3 + P2 + 512*P3) * multisync6-7: fOUT = fIN / P1 @@ -617,6 +614,8 @@ static unsigned long si5351_msynth_recalc_rate(struct clk_hw *hw, rate = parent_rate; if (hwdata->num > 5) { m = hwdata->params.p1; + } else if (hwdata->params.p3 == 0) { + return parent_rate; } else if ((si5351_reg_read(hwdata->drvdata, reg + 2) & SI5351_OUTPUT_CLK_DIVBY4) == SI5351_OUTPUT_CLK_DIVBY4) { m = 4; -- 1.9.1