From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751922AbbEDEed (ORCPT ); Mon, 4 May 2015 00:34:33 -0400 Received: from mail-bn1on0062.outbound.protection.outlook.com ([157.56.110.62]:17055 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750832AbbEDEeZ (ORCPT ); Mon, 4 May 2015 00:34:25 -0400 Authentication-Results: spf=fail (sender IP is 66.35.236.236) smtp.mailfrom=opensource.altera.com; intel.com; dkim=none (message not signed) header.d=none; Authentication-Results: intel.com; dkim=none (message not signed) header.d=none; From: To: CC: , , , , Dinh Nguyen Subject: [PATCH] dmaengine: pl300: enable the clock to PL330 dma Date: Sun, 3 May 2015 23:28:54 -0500 Message-ID: <1430713734-12175-1-git-send-email-dinguyen@opensource.altera.com> X-Mailer: git-send-email 2.2.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [64.129.157.38] X-ClientProxiedBy: BY1PR0501CA0003.namprd05.prod.outlook.com (25.162.139.13) To BN3PR03MB1367.namprd03.prod.outlook.com (25.163.34.153) X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BN3PR03MB1367;UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BY1PR0301MB0837; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:;UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(5005006)(3002001);SRVR:BN3PR03MB1367;BCL:0;PCL:0;RULEID:;SRVR:BN3PR03MB1367;BCL:0;PCL:0;RULEID:(601004)(5005006)(3002001);SRVR:BY1PR0301MB0837;BCL:0;PCL:0;RULEID:;SRVR:BY1PR0301MB0837; X-Forefront-PRVS: 05669A7924 X-Forefront-Antispam-Report-Untrusted: SFV:NSPM;SFS:(10009020)(6009001)(2351001)(66066001)(87976001)(47776003)(229853001)(62966003)(19580405001)(86362001)(53416004)(42186005)(50226001)(86152002)(77156002)(92566002)(48376002)(5001960100002)(19580395003)(107886002)(110136002)(50986999)(33646002)(122386002)(40100003)(46102003)(50466002)(4001430100001);DIR:OUT;SFP:1101;SCL:1;SRVR:BN3PR03MB1367;H:linux-builds1.altera.com;FPR:;SPF:None;MLV:sfv;LANG:en; X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN3PR03MB1367 X-EOPAttributedMessage: 0 X-MS-Exchange-Transport-CrossTenantHeadersStripped: BL2FFO11FD014.protection.gbl X-Forefront-Antispam-Report: CIP:66.35.236.236;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(339900001)(199003)(189002)(16796002)(92566002)(19580395003)(85426001)(66066001)(87936001)(106466001)(47776003)(110136002)(5001960100002)(229853001)(86152002)(122386002)(6806004)(53416004)(46102003)(2351001)(107886002)(5001830100001)(33646002)(62966003)(77156002)(48376002)(81156007)(86362001)(19580405001)(50986999)(40100003)(50466002)(50226001)(105606002)(4001540100001)(7099028)(4001430100001);DIR:OUT;SFP:1101;SCL:1;SRVR:BY1PR0301MB0837;H:sj-itexedge04.altera.priv.altera.com;FPR:;SPF:Fail;MLV:ovrnspm;A:0;MX:1;PTR:InfoDomainNonexistent;LANG:en; X-Forefront-PRVS: 05669A7924 X-OriginatorOrg: opensource.altera.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 May 2015 04:34:18.5242 (UTC) X-MS-Exchange-CrossTenant-Id: fbd72e03-d4a5-4110-adce-614d51f2077a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=fbd72e03-d4a5-4110-adce-614d51f2077a;Ip=[66.35.236.236];Helo=[sj-itexedge04.altera.priv.altera.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY1PR0301MB0837 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Dinh Nguyen Turn on the clock to the PL330 DMA if there is a clock node provided. Signed-off-by: Dinh Nguyen --- drivers/dma/pl330.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c index 0e1f567..82eb641 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c @@ -2894,6 +2894,10 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) adev->dev.dma_parms = &pl330->dma_parms; + adev->pclk = devm_clk_get(&adev->dev, "apb_pclk"); + if (adev->pclk) + clk_prepare_enable(adev->pclk); + /* * This is the limit for transfers with a buswidth of 1, larger * buswidths will have larger limits. -- 2.2.1