From: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
To: <tglx@linutronix.de>, <mingo@redhat.com>, <hpa@zytor.com>,
<tony.luck@intel.com>, <bp@alien8.de>,
<jiang.liu@linux.intel.com>, <yinghai@kernel.org>
Cc: <x86@kernel.org>, <dvlasenk@redhat.com>, <JBeulich@suse.com>,
<slaoub@gmail.com>, <luto@amacapital.net>,
<dave.hansen@linux.intel.com>, <oleg@redhat.com>,
<rostedt@goodmis.org>, <rusty@rustcorp.com.au>,
<prarit@redhat.com>, <linux@rasmusvillemoes.dk>,
<jroedel@suse.de>, <andriy.shevchenko@linux.intel.com>,
<macro@linux-mips.org>, <wangnan0@huawei.com>,
<linux-kernel@vger.kernel.org>, <linux-edac@vger.kernel.org>,
<rric@kernel.org>
Subject: [PATCH V2 2/6] x86/MCE/AMD: Read MCx_ADDR(bank) before we log the error
Date: Wed, 6 May 2015 06:58:54 -0500 [thread overview]
Message-ID: <1430913538-1415-3-git-send-email-Aravind.Gopalakrishnan@amd.com> (raw)
In-Reply-To: <1430913538-1415-1-git-send-email-Aravind.Gopalakrishnan@amd.com>
amd_decode_mce() needs value in m->addr so it can report the error
address correctly on kernel logs. This should be setup in
__log_error() before we call mce_log(). Else, m.addr = 0x0 and
amd_decode_mce() just ends up printing 0x0.
Like this:
[76916.275587] [Hardware Error]: Corrected error, no action required.
[76916.279576] [Hardware Error]: CPU:0 (15:60:0) MC0_STATUS
[-|CE|-|-|AddrV|-|-|CECC]: 0x840041000028017b
[76916.279576] [Hardware Error]: MC0 Error Address: 0x0000000000000000
We correct it in this patch by reading MSR_IA32_MCx_ADDR(bank) if
it is valid before calling mce_log().
Corrected error output:
[ 102.623490] [Hardware Error]: Corrected error, no action required.
[ 102.623668] [Hardware Error]: CPU:0 (15:60:0) MC0_STATUS
[-|CE|-|-|AddrV|-|-|CECC]: 0x840041000028017b
[ 102.623930] [Hardware Error]: MC0 Error Address: 0x00001f808f0ff040
Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
---
arch/x86/kernel/cpu/mcheck/mce_amd.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 60ae315..769f5cd 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -277,8 +277,10 @@ static void __log_error(unsigned int bank, bool is_thr, u64 misc)
m.misc = misc;
m.bank = bank;
- mce_log(&m);
+ if (m.status & MCI_STATUS_ADDRV)
+ rdmsrl(MSR_IA32_MCx_ADDR(bank), m.addr);
+ mce_log(&m);
wrmsrl(MSR_IA32_MCx_STATUS(bank), 0);
}
--
1.9.1
next prev parent reply other threads:[~2015-05-06 17:03 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-06 11:58 [PATCH V2 0/6] Enable deferred error interrupts Aravind Gopalakrishnan
2015-05-06 11:58 ` [PATCH V2 1/6] x86/MCE/AMD: Factor out logging mechanism Aravind Gopalakrishnan
2015-05-06 17:41 ` Borislav Petkov
2015-05-06 17:47 ` Aravind Gopalakrishnan
2015-06-07 17:36 ` [tip:x86/core] x86/mce/amd: " tip-bot for Aravind Gopalakrishnan
2015-05-06 11:58 ` Aravind Gopalakrishnan [this message]
2015-06-07 17:37 ` [tip:x86/core] x86/mce/amd: Collect valid address before logging an error tip-bot for Aravind Gopalakrishnan
2015-05-06 11:58 ` [PATCH V2 3/6] x86/mce: Define 'SUCCOR' cpuid bit Aravind Gopalakrishnan
2015-05-06 18:49 ` Borislav Petkov
2015-06-07 17:37 ` [tip:x86/core] x86/mce: Add support for deferred errors on AMD tip-bot for Aravind Gopalakrishnan
2015-05-06 11:58 ` [PATCH V2 4/6] x86/MCE/AMD: Introduce deferred error interrupt handler Aravind Gopalakrishnan
2015-05-07 8:24 ` Borislav Petkov
2015-06-07 17:37 ` [tip:x86/core] x86/mce/amd: " tip-bot for Aravind Gopalakrishnan
2015-05-06 11:58 ` [PATCH V2 5/6] x86, irq: Cleanup ordering of vector numbers Aravind Gopalakrishnan
2015-05-07 8:29 ` Borislav Petkov
2015-06-07 17:37 ` [tip:x86/core] x86/irq: " tip-bot for Aravind Gopalakrishnan
2015-05-06 11:58 ` [PATCH V2 6/6] x86/MCE/AMD: Rename setup_APIC_mce Aravind Gopalakrishnan
2015-05-07 8:34 ` Borislav Petkov
2015-06-07 17:38 ` [tip:x86/core] x86/mce/amd: " tip-bot for Aravind Gopalakrishnan
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