From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753169AbbEKIp1 (ORCPT ); Mon, 11 May 2015 04:45:27 -0400 Received: from mout.gmx.net ([212.227.15.15]:62574 "EHLO mout.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753008AbbEKIpF (ORCPT ); Mon, 11 May 2015 04:45:05 -0400 From: Sergej Sawazki To: mturquette@linaro.org, sboyd@codeaurora.org, sebastian.hesselbarth@gmail.com, mwelling@ieee.org, moinejf@free.fr Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Sergej Sawazki Subject: [PATCH 2/2] clk: si5351: fix .recalc_rate for multisynth 6-7 Date: Mon, 11 May 2015 10:44:59 +0200 Message-Id: <1431333899-7313-1-git-send-email-ce3a@gmx.de> X-Mailer: git-send-email 1.9.1 X-Provags-ID: V03:K0:ZiJYMKCcFvlMDf1pq1hOGKWr3pqaM8MkWVEubiC4Whz/UlO4xnM M3dYr48DVCYcXrHeQ/9O03K/jFBDldD7VnDR6J1/iHWGkb9f8iJO5p8teiMfcMPDLR8sDZt hRqpLl6RbfZMapcFq7a2eWml2QMygWF6uHFlsXZFJElbakpJne6Iqf2IcRyuif9O1R61LOT VqHPRAoTv0aGqucmXggCA== X-UI-Out-Filterresults: notjunk:1; Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org MS6 and MS7 do not have the MSx_P3 field. Do the 'params.p3 == 0' check for MS0-M5 only. See [AN619, p. 6] for details. Referenced document: [AN619] Manually Generating an Si5351 Register Map, Rev. 0.4 Signed-off-by: Sergej Sawazki --- drivers/clk/clk-si5351.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c index 48c5298..e39e1e6 100644 --- a/drivers/clk/clk-si5351.c +++ b/drivers/clk/clk-si5351.c @@ -607,9 +607,6 @@ static unsigned long si5351_msynth_recalc_rate(struct clk_hw *hw, if (!hwdata->params.valid) si5351_read_parameters(hwdata->drvdata, reg, &hwdata->params); - if (hwdata->params.p3 == 0) - return parent_rate; - /* * multisync0-5: fOUT = (128 * P3 * fIN) / (P1*P3 + P2 + 512*P3) * multisync6-7: fOUT = fIN / P1 @@ -617,6 +614,8 @@ static unsigned long si5351_msynth_recalc_rate(struct clk_hw *hw, rate = parent_rate; if (hwdata->num > 5) { m = hwdata->params.p1; + } else if (hwdata->params.p3 == 0) { + return parent_rate; } else if ((si5351_reg_read(hwdata->drvdata, reg + 2) & SI5351_OUTPUT_CLK_DIVBY4) == SI5351_OUTPUT_CLK_DIVBY4) { m = 4; -- 1.9.1