From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755776AbbEUNWG (ORCPT ); Thu, 21 May 2015 09:22:06 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:8222 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754519AbbEUNWA (ORCPT ); Thu, 21 May 2015 09:22:00 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Thu, 21 May 2015 06:19:04 -0700 From: Arto Merilainen To: thierry.reding@gmail.com CC: linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, achew@nvidia.com, srasal@nvidia.com, dnibade@nvidia.com Subject: [PATCH 0/4] Add VIC support for Tegra124 Date: Thu, 21 May 2015 16:20:21 +0300 Message-ID: <1432214425-27137-1-git-send-email-amerilainen@nvidia.com> X-Mailer: git-send-email 1.8.1.5 X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series adds Video-Image-Compositor (VIC) support for Tegra124. The unit replaced gr2d engine on T124 and it is effectively used for similar operations: making simple surface copy and fill operations. The series consists of four patches: The first patch fixes an issue in the host1x submit routine which has prevented using same buffer object for multiple command buffers. The second patch makes a simple improvement to the firewall to allow implementing address register validator for VIC. The last two patches in the series make the real modifications to Tegra DRM and device tree to enable the engine on T124. The series has been tested on Jetson TK1 by first disabling IOMMU (*), enabling CMA and running a VIC clear test case that is posted to dri-devel and linux-tegra mailing lists. The firmware image for VIC is publicly available as part of Linux For Tegra driver package [0]. [0] https://developer.nvidia.com/linux-tegra (*) Currently Tegra DRM does not support mapping the host1x command buffers into kernel address space in case IOMMU is enabled. Arto Merilainen (4): host1x: Store device address to all bufs host1x: Pass register value in firewall drm/tegra: Add VIC support ARM: tegra: Add VIC for Tegra124 arch/arm/boot/dts/tegra124.dtsi | 11 + drivers/gpu/drm/tegra/Makefile | 3 +- drivers/gpu/drm/tegra/drm.c | 9 +- drivers/gpu/drm/tegra/drm.h | 5 +- drivers/gpu/drm/tegra/gr2d.c | 4 +- drivers/gpu/drm/tegra/gr3d.c | 4 +- drivers/gpu/drm/tegra/vic.c | 593 ++++++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/tegra/vic.h | 116 ++++++++ drivers/gpu/host1x/job.c | 44 ++- include/linux/host1x.h | 5 +- 10 files changed, 769 insertions(+), 25 deletions(-) create mode 100644 drivers/gpu/drm/tegra/vic.c create mode 100644 drivers/gpu/drm/tegra/vic.h -- 1.8.1.5