From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755562AbbE2IWs (ORCPT ); Fri, 29 May 2015 04:22:48 -0400 Received: from mail-am1on0120.outbound.protection.outlook.com ([157.56.112.120]:12293 "EHLO emea01-am1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754737AbbE2IWg (ORCPT ); Fri, 29 May 2015 04:22:36 -0400 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=bhuvanchandra.dv@toradex.com; From: Bhuvanchandra DV To: CC: , , , , , , , , , Bhuvanchandra DV Subject: [PATCH 2/3] tty: serial: fsl_lpuart: remove RTS/CTS control from set/get_mctrl Date: Fri, 29 May 2015 13:35:53 +0530 Message-ID: <1432886754-30115-3-git-send-email-bhuvanchandra.dv@toradex.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1432886754-30115-1-git-send-email-bhuvanchandra.dv@toradex.com> References: <1432886754-30115-1-git-send-email-bhuvanchandra.dv@toradex.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [115.115.225.206] X-ClientProxiedBy: HKNPR06CA0028.apcprd06.prod.outlook.com (10.141.16.18) To AM3PR05MB258.eurprd05.prod.outlook.com (10.242.249.24) X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:AM3PR05MB258;UriScan:;BCL:0;PCL:0;RULEID:;SRVR:AM3PR05MB0871; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(5005006)(520003)(3002001);SRVR:AM3PR05MB258;BCL:0;PCL:0;RULEID:;SRVR:AM3PR05MB258; X-Forefront-PRVS: 059185FE08 X-Forefront-Antispam-Report: SFV:NSPM;SFS:(10019020)(6009001)(189002)(199003)(69596002)(2351001)(86362001)(77096005)(101416001)(53416004)(19580395003)(92566002)(50466002)(68736005)(42186005)(5001830100001)(47776003)(5001860100001)(33646002)(110136002)(46102003)(106356001)(77156002)(105586002)(229853001)(66066001)(62966003)(189998001)(50226001)(40100003)(81156007)(64706001)(48376002)(50986999)(87976001)(76176999)(2950100001)(97736004)(122386002)(4001540100001)(107886002)(5001960100002)(19580405001)(36756003)(4001430100001);DIR:OUT;SFP:1102;SCL:1;SRVR:AM3PR05MB258;H:tdx.toradex.int;FPR:;SPF:None;PTR:InfoNoRecords;MX:1;A:1;LANG:en; X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 May 2015 08:06:39.3713 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM3PR05MB258 X-OriginatorOrg: toradex.com Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The LPUART does not provide manual control of RTS/CTS signals, those can only be controlled by the hardware directly. Therefore manual control of those signals through mctrl can not be provided. The current implementation enables/disables the automatic control, which is not what mctrl should do, hence remove the incorrect implementation. Signed-off-by: Bhuvanchandra DV --- drivers/tty/serial/fsl_lpuart.c | 56 ++++++++--------------------------------- 1 file changed, 10 insertions(+), 46 deletions(-) diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index 08ce76f..357f623 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -822,64 +822,28 @@ static unsigned int lpuart32_tx_empty(struct uart_port *port) static unsigned int lpuart_get_mctrl(struct uart_port *port) { - unsigned int temp = 0; - unsigned char reg; - - reg = readb(port->membase + UARTMODEM); - if (reg & UARTMODEM_TXCTSE) - temp |= TIOCM_CTS; - - if (reg & UARTMODEM_RXRTSE) - temp |= TIOCM_RTS; - - return temp; + return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR; } static unsigned int lpuart32_get_mctrl(struct uart_port *port) { - unsigned int temp = 0; - unsigned long reg; - - reg = lpuart32_read(port->membase + UARTMODIR); - if (reg & UARTMODIR_TXCTSE) - temp |= TIOCM_CTS; - - if (reg & UARTMODIR_RXRTSE) - temp |= TIOCM_RTS; - - return temp; + return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR; } static void lpuart_set_mctrl(struct uart_port *port, unsigned int mctrl) { - unsigned char temp; - - temp = readb(port->membase + UARTMODEM) & - ~(UARTMODEM_RXRTSE | UARTMODEM_TXCTSE); - - if (mctrl & TIOCM_RTS) - temp |= UARTMODEM_RXRTSE; - - if (mctrl & TIOCM_CTS) - temp |= UARTMODEM_TXCTSE; - - writeb(temp, port->membase + UARTMODEM); + /* + * CTS/RTS can _only_ be handled + * automatically by the hardware. + */ } static void lpuart32_set_mctrl(struct uart_port *port, unsigned int mctrl) { - unsigned long temp; - - temp = lpuart32_read(port->membase + UARTMODIR) & - ~(UARTMODIR_RXRTSE | UARTMODIR_TXCTSE); - - if (mctrl & TIOCM_RTS) - temp |= UARTMODIR_RXRTSE; - - if (mctrl & TIOCM_CTS) - temp |= UARTMODIR_TXCTSE; - - lpuart32_write(temp, port->membase + UARTMODIR); + /* + * CTS/RTS can _only_ be handled + * automatically by the hardware. + */ } static void lpuart_break_ctl(struct uart_port *port, int break_state) -- 2.1.0