From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932220AbbFEEsY (ORCPT ); Fri, 5 Jun 2015 00:48:24 -0400 Received: from mail-pd0-f193.google.com ([209.85.192.193]:36669 "EHLO mail-pd0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751285AbbFEEsS (ORCPT ); Fri, 5 Jun 2015 00:48:18 -0400 From: Caesar Wang To: Heiko Stuebner Cc: dianders@chromium.org, Dmitry Torokhov , linux-rockchip@lists.infradead.org, Caesar Wang , Russell King , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] ARM: rockchip: fix the SMP code style Date: Fri, 5 Jun 2015 12:47:57 +0800 Message-Id: <1433479677-18086-4-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1433479677-18086-1-git-send-email-wxt@rock-chips.com> References: <1433479677-18086-1-git-send-email-wxt@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Use the below scripts to check: scripts/checkpatch.pl -f arch/arm/mach-rockchip/platsmp.c Signed-off-by: Caesar Wang --- arch/arm/mach-rockchip/platsmp.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c index 978c357..7eea805 100644 --- a/arch/arm/mach-rockchip/platsmp.c +++ b/arch/arm/mach-rockchip/platsmp.c @@ -104,7 +104,7 @@ static int pmu_set_power_domain(int pd, bool on) ret = pmu_power_domain_is_on(pd); if (ret < 0) { pr_err("%s: could not read power domain state\n", - __func__); + __func__); return ret; } } @@ -128,7 +128,7 @@ static int __cpuinit rockchip_boot_secondary(unsigned int cpu, if (cpu >= ncores) { pr_err("%s: cpu %d outside maximum number of cpus %d\n", - __func__, cpu, ncores); + __func__, cpu, ncores); return -ENXIO; } @@ -147,7 +147,7 @@ static int __cpuinit rockchip_boot_secondary(unsigned int cpu, * */ udelay(10); writel(virt_to_phys(rockchip_secondary_startup), - sram_base_addr + 8); + sram_base_addr + 8); writel(0xDEADBEAF, sram_base_addr + 4); dsb_sev(); } @@ -326,7 +326,7 @@ static int rockchip_cpu_kill(unsigned int cpu) static void rockchip_cpu_die(unsigned int cpu) { v7_exit_coherency_flush(louis); - while(1) + while (1) cpu_do_idle(); } #endif -- 1.9.1