From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754530AbbFELka (ORCPT ); Fri, 5 Jun 2015 07:40:30 -0400 Received: from mail-pa0-f65.google.com ([209.85.220.65]:34927 "EHLO mail-pa0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754440AbbFELjt (ORCPT ); Fri, 5 Jun 2015 07:39:49 -0400 From: Caesar Wang To: Heiko Stuebner Cc: dianders@chromium.org, Dmitry Torokhov , linux-rockchip@lists.infradead.org, Caesar Wang , Russell King , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/3] ARM: rockchip: fix the SMP code style Date: Fri, 5 Jun 2015 19:39:22 +0800 Message-Id: <1433504362-7549-4-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1433504362-7549-1-git-send-email-wxt@rock-chips.com> References: <1433504362-7549-1-git-send-email-wxt@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Use the below scripts to check: scripts/checkpatch.pl -f --subject arch/arm/mach-rockchip/platsmp.c Although there is a check, it's no matter. CHECK: usleep_range is preferred over udelay; see Documentation/timers/timers-howto.txt +167udelay(10); total: 0 errors, 0 warnings, 1 checks, 362 lines checked Changes in v2: - As Kever points out, Fix the subject typo WIF/WFI in PATCH [2/3]. - As Heiko suggestion, re-adjust the cpu on/off flow in PATCH [1/3]. - Use the checkpatch.pl -f --subjective to check in PATCH [3/3]. Signed-off-by: Caesar Wang --- arch/arm/mach-rockchip/platsmp.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c index 17b3473..fc50e1f 100644 --- a/arch/arm/mach-rockchip/platsmp.c +++ b/arch/arm/mach-rockchip/platsmp.c @@ -147,7 +147,7 @@ static int __cpuinit rockchip_boot_secondary(unsigned int cpu, if (cpu >= ncores) { pr_err("%s: cpu %d outside maximum number of cpus %d\n", - __func__, cpu, ncores); + __func__, cpu, ncores); return -ENXIO; } @@ -166,7 +166,7 @@ static int __cpuinit rockchip_boot_secondary(unsigned int cpu, * */ udelay(10); writel(virt_to_phys(rockchip_secondary_startup), - sram_base_addr + 8); + sram_base_addr + 8); writel(0xDEADBEAF, sram_base_addr + 4); dsb_sev(); } @@ -345,7 +345,7 @@ static int rockchip_cpu_kill(unsigned int cpu) static void rockchip_cpu_die(unsigned int cpu) { v7_exit_coherency_flush(louis); - while(1) + while (1) cpu_do_idle(); } #endif @@ -358,4 +358,5 @@ static struct smp_operations rockchip_smp_ops __initdata = { .cpu_die = rockchip_cpu_die, #endif }; + CPU_METHOD_OF_DECLARE(rk3066_smp, "rockchip,rk3066-smp", &rockchip_smp_ops); -- 1.9.1